Quantum error correction for long chains of trapped ions (2503.22071v2)

Abstract: We propose a model for quantum computing with long chains of trapped ions and we design quantum error correction schemes for this model. The main components of a quantum error correction scheme are the quantum code and a quantum circuit called the syndrome extraction circuit, which is executed to perform error correction with this code. In this work, we design syndrome extraction circuits tailored to our ion chain model, a syndrome extraction tuning protocol to optimize these circuits, and we construct new quantum codes that outperform the state-of-the-art for chains of about $50$ qubits. To establish a baseline under the ion chain model, we simulate the performance of surface codes and bivariate bicycle (BB) codes equipped with our optimized syndrome extraction circuits. Then, we propose a new variant of BB codes defined by weight-five measurements, that we refer to as BB5 codes and we identify BB5 codes that achieve a better minimum distance than any BB codes with the same number of logical qubits and data qubits, such as a $[[48, 4, 7]]$ BB5 code. For a physical error rate of $10^{-3}$, the $[[48, 4, 7]]$ BB5 code achieves a logical error rate per logical qubit of $5 \cdot 10^{-5}$, which is four times smaller than the best BB code in our baseline family. It also achieves the same logical error rate per logical qubit as the distance-7 surface code but using four times fewer physical qubits per logical qubit.

• The paper defines a hardware model for trapped ion chains and tailors syndrome extraction circuits to its constraints, including leveraging parallel measurements.
• It introduces BB5 codes, a new family of LDPC codes with weight-5 stabilizers, which achieve a higher minimum distance than comparable BB6 codes.
• The [[48, 4, 7]] BB5 code shows comparable logical error rates to a distance-7 surface code but uses four times fewer physical qubits per logical qubit.

Quantum error correction (QEC) for trapped ion quantum computers, particularly those employing long ion chains, presents unique challenges and opportunities due to the system's specific architecture and noise characteristics. The paper "Quantum error correction for long chains of trapped ions" (2503.22071) addresses this by proposing a tailored hardware model, optimizing syndrome extraction circuits for this model, and introducing a new family of quantum codes, BB5 codes, which demonstrate improved performance for systems around 50 qubits.

Ion Chain Hardware Model

The paper establishes a specific model for quantum computation based on long trapped ion chains, encapsulating key architectural features relevant to QEC implementation. This model assumes:

• Full Connectivity: Any pair of qubits within the chain can interact via mediated two-qubit gates, eliminating geometric locality constraints often found in other architectures.
• Sequential Unitary Gates: Only one unitary gate (single- or two-qubit) can be executed at any given time step across the entire chain.
• Parallel Non-Unitary Operations: Qubit reset and measurement operations can be performed in parallel on any subset of qubits within the chain.
• Measurement Time Penalty: Measurement operations are assumed to be significantly slower than gate operations, characterized by a factor tau_m (e.g., tau_m = 10), representing the ratio of measurement time to the time required for a two-qubit gate.
• Noise Model: A circuit-level depolarizing noise model is employed. Two-qubit gates are the dominant error source with probability p. Single-qubit operations (gates, preparation, measurement readout) have an error rate of p/10. Idle qubits experience decoherence with a rate of p/100 per two-qubit gate time step, although this idle error rate increases significantly during the longer measurement periods.

This model provides a framework for designing and evaluating QEC protocols under constraints characteristic of trapped ion systems, particularly the trade-off between leveraging all-to-all connectivity and mitigating the impact of sequential gate execution and slow measurements.

Tailored Syndrome Extraction Circuits

A crucial component of QEC is the syndrome extraction circuit. The paper designs circuits optimized for the described ion chain model. The key features of these circuits (Algorithm 1 in the paper) include:

• Leveraging Connectivity: The all-to-all connectivity allows flexibility in scheduling stabilizer measurements, as any stabilizer generator can be measured without being restricted by qubit layout.
• Variable Ancilla Qubits: The circuits utilize a variable number, n_a, of ancilla qubits dedicated to syndrome measurement.
• Parallel Measurement Batches: To mitigate the bottleneck of slow measurements (tau_m), stabilizer measurements are grouped into batches. Within each batch, up to n_a stabilizers can be measured concurrently using the available ancilla qubits. The n_a ancilla qubits involved in a batch are then measured simultaneously using the model's parallel measurement capability. This significantly reduces the idle time experienced by data qubits compared to purely sequential measurement.
• Sequential Gate Application: The constraint of sequential unitary gates is respected. The controlled-Pauli gates required to measure each stabilizer are applied one after another, even for stabilizers within the same parallel measurement batch.

The structure of the syndrome extraction round involves iterating through batches of stabilizers. For each stabilizer within a batch, the necessary sequence of controlled-Pauli gates is applied sequentially, targeting one of the n_a ancillas. Once all gates for a batch are completed, the corresponding n_a ancillas are measured in parallel. This process repeats until all stabilizer generators of the code have been measured.

Syndrome Extraction Optimization Protocol

The performance of a QEC code depends critically on the efficiency of its syndrome extraction circuit, particularly the choice of n_a (the number of ancilla qubits used for parallel measurements). Using more ancillas allows for greater parallelism, reducing the duration of the syndrome extraction cycle and thus the accumulated idle error, but increases the physical qubit overhead. The paper introduces an optimization protocol (Algorithm 2) to determine the optimal n_a for a given code, physical error rate p, and measurement time factor tau_m.

The protocol functions by iteratively simulating the logical error rate of the QEC scheme:

1. Start with a minimal number of ancillas (n_a = 1).
2. Simulate the logical error rate P_L(n_a) for the current number of ancillas.
3. Increment n_a by one.
4. Simulate the new logical error rate P_L(n_a+1).
5. Compare the improvement: Calculate the ratio P_L(n_a+1) / P_L(n_a).
6. Stop if the relative improvement is marginal, specifically if P_L(n_a+1) / P_L(n_a) > gamma, where gamma is a threshold close to 1 (e.g., gamma = 0.95). Otherwise, repeat from step 3.

This protocol effectively balances the reduction in logical error rate due to increased measurement parallelism against the diminishing returns and increased resource cost of adding more ancillas. It allows for tuning the syndrome extraction circuit to the specific parameters of the code and the underlying hardware noise characteristics.

BB5 Quantum Codes

The paper introduces a novel class of quantum low-density parity-check (LDPC) codes derived from Bivariate Bicycle (BB) codes, termed BB5 codes. Standard BB codes are CSS codes constructed from pairs of square matrices $(A, B)$ that satisfy $AB^T = BA^T$. The parity check matrix is typically given by $H = [A|B]$. BB5 codes modify this construction.

• Construction: BB5 codes are defined similarly to BB codes but utilize parity check matrices constructed from sums of five permutation matrices (specifically tensor products of cycle shift matrices, $Q_{\ell}^u \otimes Q_m^v$). This results in stabilizer generators that have weight 5, contrasting with the weight-6 stabilizers commonly found in the BB code families previously studied (often referred to as BB6 codes).
• Improved Parameters: The research identifies specific BB5 codes that achieve a higher minimum distance (d) compared to known BB6 codes with the same number of physical qubits (n) and logical qubits (k). Notable examples include:
  • A [[30, 4, 5]] BB5 code, whereas the best comparable BB6 code is [[30, 4, 4]].
  • A [[48, 4, 7]] BB5 code, whereas the best comparable BB6 code is [[48, 4, 6]].
  • The higher minimum distance generally translates to better error correction capability for the same code dimensions.

These BB5 codes, leveraging the flexibility of the BB framework while targeting lower stabilizer weights, offer potentially more efficient QEC solutions.

Performance Analysis and Comparison

The effectiveness of the proposed BB5 codes and optimized syndrome extraction circuits was evaluated through simulations using the described ion chain model, with p=10^-3 and tau_m=10.

• BB5 vs. BB6: The BB5 codes demonstrated superior performance due to their higher minimum distance. The [[48, 4, 7]] BB5 code achieved a logical error rate per logical qubit (P_L/k) approximately 6 times lower than the corresponding [[48, 4, 6]] BB6 code under identical simulation conditions. More significantly, compared to the best-performing BB6 code identified in the baseline paper for n <= 50, the [[48, 4, 7]] BB5 code still achieved a 4-fold reduction in P_L/k.
• BB5 vs. Surface Code: The surface code is a leading candidate for QEC, often used as a benchmark. The paper compares the [[48, 4, 7]] BB5 code with the distance-7 surface code ([[49, 1, 7]]). The simulations showed that the [[48, 4, 7]] BB5 code achieves a logical error rate per logical qubit (P_L/k \approx 5 \times 10^{-5}) comparable to that of the distance-7 surface code (P_L/k \approx 6 \times 10^{-5}) at p=10^{-3}. However, the BB5 code achieves this performance while encoding k=4 logical qubits using n=48 physical qubits (12 physical qubits per logical qubit), whereas the surface code encodes only k=1 logical qubit using n=49 physical qubits (49 physical qubits per logical qubit). This represents an approximate 4x improvement in qubit overhead per logical qubit for the BB5 code compared to the surface code at similar performance levels for these parameters.

These results highlight the potential of using tailored LDPC codes like BB5, combined with optimized syndrome extraction, to achieve fault tolerance more efficiently in terms of qubit resources compared to standard surface codes, especially in architectures like trapped ions that support high connectivity.

Conclusion

The research presented in (2503.22071) provides a detailed framework for implementing and evaluating QEC on long-chain trapped ion quantum computers. By defining a realistic hardware model, designing tailored and optimized syndrome extraction circuits that leverage ion trap strengths (connectivity, parallel measurement) while mitigating weaknesses (sequential gates, slow measurement), and introducing the high-performing BB5 code family, the work demonstrates a path towards resource-efficient fault tolerance. The finding that the [[48, 4, 7]] BB5 code can achieve logical error rates comparable to a distance-7 surface code using four times fewer physical qubits per logical qubit is a significant result for the practical realization of fault-tolerant quantum computing on near-term trapped ion devices.