Circuit Model Reduction with Scaled Relative Graphs (2204.01434v2)

Abstract: Continued fractions are classical representations of complex objects (for example, real numbers) as sums and inverses of simpler objects (for example, integers). The analogy in linear circuit theory is a chain of series/parallel one-ports: the port behavior is a continued fraction containing the port behaviors of its elements. Truncating a continued fraction is a classical method of approximation, which corresponds to deleting the circuit elements furthest from the port. We apply this idea to chains of series/parallel one-ports composed of arbitrary nonlinear relations. This gives a model reduction method which automatically preserves properties such as incremental positivity. The Scaled Relative Graph (SRG) gives a graphical representation of the original and truncated port behaviors. The difference of these SRGs gives a bound on the approximation error, which is shown to be competitive with existing methods.