Building a fault-tolerant quantum computer using concatenated cat codes (2012.04108v2)

Abstract: We present a comprehensive architectural analysis for a proposed fault-tolerant quantum computer based on cat codes concatenated with outer quantum error-correcting codes. For the physical hardware, we propose a system of acoustic resonators coupled to superconducting circuits with a two-dimensional layout. Using estimated physical parameters for the hardware, we perform a detailed error analysis of measurements and gates, including CNOT and Toffoli gates. Having built a realistic noise model, we numerically simulate quantum error correction when the outer code is either a repetition code or a thin rectangular surface code. Our next step toward universal fault-tolerant quantum computation is a protocol for fault-tolerant Toffoli magic state preparation that significantly improves upon the fidelity of physical Toffoli gates at very low qubit cost. To achieve even lower overheads, we devise a new magic-state distillation protocol for Toffoli states. Combining these results together, we obtain realistic full-resource estimates of the physical error rates and overheads needed to run useful fault-tolerant quantum algorithms. We find that with around 1,000 superconducting circuit components, one could construct a fault-tolerant quantum computer that can run circuits which are currently intractable for classical computers. Hardware with 18,000 superconducting circuit components, in turn, could simulate the Hubbard model in a regime beyond the reach of classical computing.

• The paper introduces a novel architecture for fault-tolerant quantum computing by concatenating bosonic cat codes with conventional error-correcting codes.
• It employs engineered two-phonon dissipation and rigorous numerical simulations to validate gate operations like CNOT and Toffoli at cat sizes up to |α|²=10.
• The paper demonstrates that optimized coupling between storage and buffer modes, along with effective syndrome extraction using repetition and surface codes, reduces logical error rates.

Building a Fault-Tolerant Quantum Computer Using Concatenated Cat Codes

The paper under discussion presents an architectural framework for constructing a fault-tolerant quantum computer. This framework leverages bosonic cat codes and superconducting circuit components, introducing an innovative approach to error correction in quantum computing. Central to this proposal is the concatenation of cat codes with traditional quantum error-correcting codes such as repetition and surface codes. By broadening the understanding of fault-tolerance mechanisms, this research provides a detailed analysis of both physical and logical layers of quantum computation.

The authors propose a hybrid quantum architecture incorporating acoustic resonators intricately coupled to superconducting circuits. This blend is designed to mitigate quantum state decoherence through engineered two-phonon dissipation processes. The hardware level is meticulously detailed, with cat codes acting as encoders for quantum bits, supported by circuit elements like the Asymmetrically-Threaded SQUID (ATS), employed to implement the necessary nonlinear interactions for dissipation. Importantly, the coupling between storage and buffer modes is optimized to reduce crosstalk errors and enhance bifurcation points in the stability regime.

Key highlights include the capability of preserving noise bias, particularly against undesired bit flips, enabling effective quantum error correction. The gates and operations within this framework, especially the CNOT and Toffoli operations, have been put through rigorous numerical simulations facilitated by the implementation of the shifted Fock basis method, aiding in efficient computation even at large cat sizes, up to $|\alpha|^{2}=10$. This methodological innovation is pivotal in the realistic simulation of quantum error correction performance across different regimes of operation.

Moreover, the authors elaborate on the approach for both $X$- and $Z$-basis measurements, forming a foundation for high-fidelity stabilizer measurements necessary in logical layer operations, particularly when mapping to outer codes. The analysis of error syndrome extraction employing repetition and surface codes gives insight into logical error rates that reveal the design's resilience against noise, even with modest component fidelities.

Through transcending hardware-level analysis, the paper advances into logical layer designs by demonstrating resource overheads for quantum algorithms running on networks simulated to estimate the Hubbard model's ground state energy. The concatenated cat code architecture supports large-scale quantum computation tasks that extend traditional classical computation capabilities, depicting a clear pathway of applicability to contemporary computational problems.

Despite the potential challenges in realization and the demand for advancing materials science, this structured approach signifies a noteworthy stride in quantum architectures. It aims to significantly reduce quantum computational overhead on account of its robust fault-tolerant design principles, presenting pathways not only for near-term quantum processors but for scalable quantum solutions pivotal for future applications.

Crucially, this research underscores the necessity for further experimental exploration and optimization, particularly regarding coherence time enhancements and operational speed optimization, to turn this architectural framework into a practical, deployable fault-tolerant quantum computing system.