Blueprint for a Scalable Photonic Fault-Tolerant Quantum Computer (2010.02905v2)

Abstract: Photonics is the platform of choice to build a modular, easy-to-network quantum computer operating at room temperature. However, no concrete architecture has been presented so far that exploits both the advantages of qubits encoded into states of light and the modern tools for their generation. Here we propose such a design for a scalable and fault-tolerant photonic quantum computer informed by the latest developments in theory and technology. Central to our architecture is the generation and manipulation of three-dimensional hybrid resource states comprising both bosonic qubits and squeezed vacuum states. The proposal enables exploiting state-of-the-art procedures for the non-deterministic generation of bosonic qubits combined with the strengths of continuous-variable quantum computation, namely the implementation of Clifford gates using easy-to-generate squeezed states. Moreover, the architecture is based on two-dimensional integrated photonic chips used to produce a qubit cluster state in one temporal and two spatial dimensions. By reducing the experimental challenges as compared to existing architectures and by enabling room-temperature quantum computation, our design opens the door to scalable fabrication and operation, which may allow photonics to leap-frog other platforms on the path to a quantum computer with millions of qubits.

• The paper introduces a hybrid architecture that combines discrete and continuous quantum variables to enable fault-tolerant, room-temperature operation.
• It details a scalable 3D cluster state built on 2D photonic chips, promoting modular fabrication and robust error correction.
• Extensive simulations demonstrate a squeezing threshold of 10.5 dB and a swap-out probability threshold near 23.6%, validating the design's feasibility.

Overview of "Blueprint for a Scalable Photonic Fault-Tolerant Quantum Computer"

The paper "Blueprint for a Scalable Photonic Fault-Tolerant Quantum Computer" by Bourassa et al. presents a detailed design and theoretical framework for developing a large-scale, fault-tolerant quantum computer utilizing photonics. This work addresses the challenges of integrating various quantum technological advances and offers a modular platform that leverages the inherent properties of photons, promoting room-temperature operation and seamless modular networking.

Key Aspects of the Design:

1. Hybrid Quantum Architecture: The authors propose a novel hybrid quantum architecture that combines discrete-variable (DV) qubits with continuous-variable (CV) quantum information processes. The system utilizes both bosonic qubits and squeezed vacuum states as resources, exploiting the generation and manipulation capabilities of photonic systems.
2. Cluster State Configuration: Central to the architecture is the creation of a three-dimensional cluster state that is built on a network of two-dimensional integrated photonic chips. These chips enable the generation and manipulation of an entangled qubit cluster state spanning temporal and spatial dimensions.
3. Fault Tolerance and Error Correction: The paper reports extensive simulation results that demonstrate fault tolerance through quantum error correction protocols. The authors showcase the performance of the proposed lattice structure even in the presence of noise and imperfections stemming from probabilistic generation of qubits and finite squeezing in the system. They identify squeezing thresholds and detail how the architecture manages swap-out probabilities, where missing qubits are substituted with easily producible squeezed states.
4. Modular Fabrication: A significant advantage of this approach is the potential for scalable fabrication. Room-temperature operation makes it feasible for manufacturing using existing silicon photonics technologies, emphasizing modularity and simplified integration across different computing modules.
5. Simulation and Threshold Analysis: The paper conducts a thorough simulation to pinpoint the error thresholds, revealing a squeezing threshold of about 10.5 dB and a maximum swap-out probability threshold of approximately 23.6%. For experimental feasibility, the simulations suggest a tolerable swap-out threshold for a squeezing of 15 dB, translating to a swap-out threshold of 13.3%.

Implications and Future Work:

This work has several implications for the future of quantum computing. Photonics, as suggested by the findings, offers a pathway towards practical, high-fidelity quantum computations due to its compatibility with existing infrastructure and intrinsic advantages like fast operation speeds and miniaturization. The choice of integrating room-temperature photonic components could reduce costs and increase the accessibility of quantum technologies.

Future developments are expected to focus on refining the error-correction mechanisms, enhancing the GKP state generation probabilities, and further improving the error thresholds through optimized decoding strategies. Moreover, the practical deployment of this architecture will necessitate developments in manufacturing precision, loss management, and scalable integration techniques across networks of photonic chips.

The blueprint detailed in this paper highlights significant progress in photonic quantum computing and sets the stage for subsequent experimental efforts toward realizing scalable and fault-tolerant quantum processors.