Packet Transactions: High-level Programming for Line-Rate Switches (1512.05023v2)

Abstract: Many algorithms for congestion control, scheduling, network measurement, active queue management, security, and load balancing require custom processing of packets as they traverse the data plane of a network switch. To run at line rate, these data-plane algorithms must be in hardware. With today's switch hardware, algorithms cannot be changed, nor new algorithms installed, after a switch has been built. This paper shows how to program data-plane algorithms in a high-level language and compile those programs into low-level microcode that can run on emerging programmable line-rate switching chipsets. The key challenge is that these algorithms create and modify algorithmic state. The key idea to achieve line-rate programmability for stateful algorithms is the notion of a packet transaction : a sequential code block that is atomic and isolated from other such code blocks. We have developed this idea in Domino, a C-like imperative language to express data-plane algorithms. We show with many examples that Domino provides a convenient and natural way to express sophisticated data-plane algorithms, and show that these algorithms can be run at line rate with modest estimated die-area overhead.

• The paper introduces packet transactions, the Domino language, and the Banzai machine model to enable high-level programming for line-rate network switches.
• Domino allows writing complex stateful data-plane algorithms more concisely than languages like P4, simplifying programmer tasks.
• This approach offers a practical path towards building flexible network switches that can be updated post-deployment without sacrificing line-rate performance.

Packet Transactions: High-level Programming for Line-Rate Switches

The paper "Packet Transactions: High-level Programming for Line-Rate Switches" by Sivaraman et al. explores the challenges and innovations required to program data-plane algorithms in network switches. These switches need to operate at line rates up to 100 Gbit/s, which typically necessitates custom and rigid hardware implementations that are difficult to modify post-deployment. The authors introduce a new abstraction, the packet transaction, to facilitate high-level programming for switch data planes while preserving line-rate performance.

The central contribution of this work is the development of the Domino programming language, a domain-specific language designed to enable easier expression of data-plane algorithms. Domino allows network operators to write algorithms in a C-like syntax, focusing on atomic and isolated packet transactions to handle stateful operations. The paper details the Domino compiler infrastructure, which translates these high-level programs into an intermediate form suitable for line-rate execution on programmable switch chipsets, represented by the model Banzai.

Key Contributions

1. Domino Language: Domino adopts a high-level syntax similar to C, with constructs tailored for data-plane operations, enabling programmers to articulate packet-processing logic succinctly and naturally.
2. Banzai Machine Model: The paper proposes Banzai as an abstract machine model to serve as a compilation target. It abstracts core aspects of modern programmable switches, focusing on the line rate and stateful operations. Banzai is characterized by its "atoms", smallest processing units representing permissible operations within a single clock cycle.
3. Packet Transactions: Central to the proposed approach is the packet transaction abstraction. It ensures that state changes by data-plane algorithms during packet processing are conducted safely and atomically, preserving performance while providing isolation from other code blocks.
4. Compiler and Synthesis: A significant achievement of Banzai and Domino is the development of an all-or-nothing compilation strategy. The compiler either successfully maps a Domino program to a set of Banzai-compatible configurations guaranteeing line-rate performance, or it rejects it outright. The use of program synthesis via SKETCH to map operations to the available hardware primitives is a noteworthy method to realize this compilation model.

Evaluation and Implications

The authors evaluate Domino's expressiveness by translating various stateful data-plane algorithms, such as flowlet switching, heavy-hitter detection, and congestion control, into Domino and comparing their implementation complexity against P4, another network-programming language. Findings indicate that Domino provides a more concise expression of stateful operations, making the programmer's task notably simpler.

Further, the paper provides a feasibility analysis for implementing Banzai machines with existing technology. The designs accommodate multiple pipeline stages with feasible area overheads, suggesting that the hardware constraints and compiler techniques proposed are within reach of current and near-future network phenomena.

Practical and Theoretical Implications

Practically, this work proposes a significant shift towards more flexible network switch configurations, which can adapt post-deployment to novel algorithms without sacrificing performance. Theoretically, it raises compelling questions about the abstraction level suitable for data-plane programming, suggesting a rich area of future research in the definition of atoms and optimization of synthesis processes.

Future Directions

As the authors emphasize, the evolution of programmable switches will likely involve refining machine models like Banzai to support even more complex operations at scale. Enhancing the atom primitives to support broader classes of algorithms or integrate machine learning for switching decisions might also be promising paths. Additionally, extending language support for more dynamic algorithm classes, such as those needing frequent state updates or heterogeneous processing resources, presents a compelling future challenge.

In conclusion, this work lays foundational insights and tools for bridging the gap between hardware efficiency and programming flexibility in network switches, encouraging further exploration and advancement in networked systems.