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All-Digital Self-interference Cancellation Technique for Full-duplex Systems (1406.5555v1)

Published 20 Jun 2014 in cs.IT and math.IT

Abstract: Full-duplex systems are expected to double the spectral efficiency compared to conventional half-duplex systems if the self-interference signal can be significantly mitigated. Digital cancellation is one of the lowest complexity self-interference cancellation techniques in full-duplex systems. However, its mitigation capability is very limited, mainly due to transmitter and receiver circuit's impairments. In this paper, we propose a novel digital self-interference cancellation technique for full-duplex systems. The proposed technique is shown to significantly mitigate the self-interference signal as well as the associated transmitter and receiver impairments. In the proposed technique, an auxiliary receiver chain is used to obtain a digital-domain copy of the transmitted Radio Frequency (RF) self-interference signal. The self-interference copy is then used in the digital-domain to cancel out both the self-interference signal and the associated impairments. Furthermore, to alleviate the receiver phase noise effect, a common oscillator is shared between the auxiliary and ordinary receiver chains. A thorough analytical and numerical analysis for the effect of the transmitter and receiver impairments on the cancellation capability of the proposed technique is presented. Finally, the overall performance is numerically investigated showing that using the proposed technique, the self-interference signal could be mitigated to ~3dB higher than the receiver noise floor, which results in up to 76% rate improvement compared to conventional half-duplex systems at 20dBm transmit power values.

Citations (399)

Summary

  • The paper introduces a novel DSIC technique incorporating an auxiliary receiver chain and a shared oscillator to mitigate phase noise and reduce self-interference.
  • It demonstrates a 30dB reduction in residual SI and a 76% rate improvement at 20dBm transmit power compared to half-duplex systems.
  • The study thoroughly analyzes impairments like nonlinear distortions and quantization noise to validate the DSIC method's robustness in realistic IEEE 802.11 scenarios.

Overview of All-Digital Self-Interference Cancellation for Full-Duplex Systems

The paper presents a novel digital self-interference cancellation (DSIC) technique for full-duplex (FD) systems, which holds the potential to significantly enhance spectral efficiency by allowing simultaneous transmission and reception on the same frequency channel. Unlike conventional half-duplex systems, FD systems are constrained by the self-interference (SI) signal generated by the proximity of the transmitting and receiving antennas. Efficient self-interference cancellation is crucial to achieving the theoretical doubling of spectral efficiency in FD systems.

Key Contributions and Methodology

The authors introduce an innovative FD architecture incorporating an auxiliary receiver chain that creates a digital-domain copy of the transmitted radio frequency (RF) self-interference signal. This architecture enables the digital cancellation of the SI signal, alongside any associated impairments originating from the transmitter and receiver. Notably, the proposed scheme employs a common oscillator shared across auxiliary and primary receiver chains to mitigate receiver phase noise—a prevalent issue jeopardizing the performance of traditional DSIC methods.

A comprehensive analysis of the proposed technique evaluates its efficacy in suppressing the SI signal to levels approximately 3dB above the receiver noise floor. This, in turn, leads to a substantial rate improvement—up to 76% compared to traditional half-duplex systems when operating at 20dBm transmit power.

Experimental and Numerical Insights

The authors provide a thorough analytical and numerical examination of the impact various impairments have on the cancellation capability of the proposed architecture. They explore receiver and transmitter nonlinearities, phase noise, Gaussian and quantization noise, and channel estimation errors, identifying these as critical factors influencing DSIC performance. The paper outlines strategies for mitigating these challenges, including the implementation of nonlinearity estimation algorithms and digital-domain cancellation procedures.

Analytical results, combined with system simulations based on IEEE 802.11 specifications, demonstrate that this DSIC architecture is resilient under various realistic transceiver conditions. The paper delineates conditions under which the proposed technique outperforms state-of-the-art alternatives, providing up to 30dB reduction in residual SI power due to the effective handling of phase noise and nonlinear distortion.

Implications and Future Work

The introduction of this DSIC technique has significant implications for future wireless communications, including implications for 5G and beyond. By effectively facilitating FD operations at low complexity and reduced power consumption, the architecture could see widespread adoption across a variety of wireless infrastructure setups. Furthermore, the technique has the potential for application in cognitive radios, MIMO systems, and millimeter-wave communications, where efficient spectrum utilization is paramount.

Future investigations could delve into optimizing this architecture for integration with advanced MIMO techniques, exploring different antenna configurations, and improving passive suppression strategies to further reduce receiver distortion. Given the rapid evolution of wireless technology, ongoing refinements and additional field tests will be essential to identify and overcome any remaining limitations, particularly in high-density or heterogeneous network environments.

In conclusion, the research presented in this paper propounds a robust framework for enhancing the performance and feasibility of full-duplex systems, offering substantive progress towards overcoming one of the most challenging impediments—self-interference cancellation.