Statistical Study of Deep Sub-Micron Dual-Gated Field-Effect Transistors on Monolayer CVD Molybdenum Disulfide Films (1303.0776v1)

Abstract: Monolayer Molybdenum Disulfide (MoS2) with a direct band gap of 1.8 eV is a promising two-dimensional material with a potential to surpass graphene in next generation nanoelectronic applications. In this letter, we synthesize monolayer MoS2 on Si/SiO2 substrate via chemical vapor deposition (CVD) method and comprehensively study the device performance based on dual-gated MoS2 field-effect transistors. Over 100 devices are studied to obtain a statistical description of device performance in CVD MoS2. We examine and scale down the channel length of the transistors to 100 nm and achieve record high drain current of 62.5 mA/mm in CVD monolayer MoS2 film ever reported. We further extract the intrinsic contact resistance of low work function metal Ti on monolayer CVD MoS2 with an expectation value of 175 {\Omega}.mm, which can be significantly decreased to 10 {\Omega}.mm by appropriate gating. Finally, field-effect mobilities ({\mu}FE) of the carriers at various channel lengths are obtained. By taking the impact of contact resistance into account, an average and maximum intrinsic {\mu}FE is estimated to be 13.0 and 21.6 cm2/Vs in monolayer CVD MoS2 films, respectively.

Statistical Analysis of Dual-Gated Field-Effect Transistors on Monolayer CVD Molybdenum Disulfide Films

This paper offers a comprehensive paper of monolayer molybdenum disulfide (MoS₂) films synthesized via chemical vapor deposition (CVD), focusing on their potential advantages for nanoelectronic applications. The research specifically examines the performance of dual-gated field-effect transistors (FETs) fabricated from these films, exploring a range of critical device parameters. Over 100 transistors were statistically analyzed to elucidate the relationship between synthesis methodology and transistor performance metrics, including drain current, contact resistance, and carrier mobility.

The paper begins by establishing the context in which two-dimensional materials like MoS₂ are evaluated, noting MoS₂'s significant potential due to its direct band gap of 1.8 eV, contrasting with graphene's gapless electronic structure, which hinders certain applications. Highlighted is the synthesis process of MoS₂ via CVD, alongside a detailed discussion of the associated benefits and challenges, such as uniformity and grain size, which are pertinent to device performance.

A key contribution of this paper is the achievement of a record-high drain current of 62.5 mA/mm for CVD MoS₂ transistors at a channel length scaled down to 100 nm. This high value underscores the effectiveness of CVD in producing high-quality, monolayer MoS₂ films for transistor applications. Additionally, the material's intrinsic contact resistance was extensively investigated, with the authors reporting a value of 175 Ω·mm for titanium contacts on monolayer CVD MoS₂, which can be significantly reduced to 10 Ω·mm by suitable gating techniques.

In terms of mobility, the paper estimates field-effect mobilities (μ_FE) for carriers at various channel lengths, taking into account contact resistance. The reported average and maximum intrinsic μ_FE values are 13.0 cm²/Vs and 21.6 cm²/Vs, respectively, in monolayer CVD MoS₂ films. This insight provides a basis for understanding the electronic transport phenomena in MoS₂ and highlights the necessity of minimizing contact resistance for optimal device performance.

The methodological framework involves meticulous fabrication and characterization of CVD MoS₂-based transistors. The synthesis leverages vapor phase deposition, using MoO₃ nanoribbons and sublimated sulfur to produce uniform monolayer films. Additionally, the paper discusses the dual-gate architecture, featuring heavily doped silicon and SiO₂, and emphasizes the modulation of carrier density via either gate, with a focus on the differential outcomes of top-gate versus back-gate modulations.

This research carries significant implications for both theoretical exploration and practical applications, particularly in advancing the understanding of CVD-grown 2D materials and their integration into electronic components. The detailed examination of MoS₂ FETs provides a robust dataset for future improvements in synthesis techniques and device fabrication processes. By delineating the effects of contact resistance and mobility, the paper offers guidelines for optimizing device performance, with potential to influence the development of next-generation transistors, sensors, and integrated circuits based on 2D semiconductors.

Future research directions, as implied by the findings, orient towards further refinement of the CVD process and metallic contact optimization. Continued exploration of contact resistivity and mobility under varying fabrication conditions can pave the way for the widespread use of 2D materials in practical electronics, necessitating a more in-depth understanding of the metal/semiconductor interface and elaborate source/drain engineering techniques.