Realizing a Continuous Set of Two-Qubit Gates Parameterized by an Idle Time (2503.11204v1)

Abstract: Continuous gate sets are a key ingredient for near-term quantum algorithms. Here, we demonstrate a hardware-efficient, continuous set of controlled arbitrary-phase ($\mathrm{C}Z_{\theta}$) gates acting on flux-tunable transmon qubits. This implementation is robust to control pulse distortions on time scales longer than the duration of the gate, making it suitable for deep quantum circuits. Our calibration procedure makes it possible to parameterize the continuous gate set with a single control parameter, the idle time between the two rectangular halves of the net-zero control pulse. For calibration and characterization, we develop a leakage measurement based on coherent amplification, and a new cycle design for cross-entropy benchmarking. We demonstrate gate errors of $0.7 \%$ and leakage of $4\times 10^{-4}$ across the entire gate set. This native gate set has the potential to reduce the depth and improve the performance of near-term quantum algorithms compared to decompositions into $\mathrm{C}Z_{\pi}$ gates and single-qubit gates. Moreover, we expect the calibration and benchmarking methods to find further possible applications.

Overview of Continuous Two-Qubit Gate Set Implementation on Transmon Qubits

The paper "Realizing a Continuous Set of Two-Qubit Gates Parameterized by an Idle Time" introduces a significant advancement in the realization of two-qubit gates for quantum computing using flux-tunable transmon qubits. The paper focuses on developing a hardware-efficient implementation of a continuous set of controlled arbitrary-phase ($C_{}$) gates which are essential for optimizing the performance of near-term quantum algorithms.

Key Contributions and Methodology

The authors address a notable challenge in quantum gate implementation: the susceptibility of controlled-phase gates to pulse distortions over long circuits. To counteract this, they propose a calibration strategy which allows the continuous gate set to be parameterized by a single control parameter, known as the idle time. This simplifies the otherwise complex and interdependent parameter adjustments required in previous gate set implementations.

Central to their methodology is the utilization of net-zero waveform pulses. These pulses are decomposed into two halves with opposite polarities, with an intervening idle time which allows the population temporarily in the second excited state to acquire a conditional phase. This parameterization offers linear control over the phase, a marked improvement over past methodologies which required simultaneous tuning of multiple parameters.

Numerical and Empirical Results

Empirical results demonstrate the efficacy of this calibration strategy with enhanced gate fidelity and minimal leakage. The team reports an impressive gate error of 0.7% and a leakage rate as low as $4 \times 10^{-4}$ for the entire gate set. These performance metrics not only underscore the system's robustness to control pulse distortions but also its potential to improve algorithmic performance owing to reduced circuit depth.

The calibration and characterization features were further augmented by developing a leakage measurement method and a refined cycle design for cross-entropy benchmarking. These innovations were integral in achieving uniform gate performance and suppression of residual interactions.

Implications and Future Directions

The introduction of a continuous gate set with simplified parameterization holds substantial implications for both theoretical research and practical implementations in quantum computing. On a practical level, the reduced gate depth and improved error rates foster more efficient computations, particularly impactful for superconducting qubits used in variational quantum algorithms. Theoretically, this work provides a framework for further developments in continuous quantum gate sets, potentially extending to more complex qubit systems and broader applications in quantum information processing.

Looking towards the future, the calibration and benchmarking methodologies put forth in this paper could be adapted for error correction protocols and more intricate multiplexed qubit architectures. Moreover, the tested concepts may drive future designs of scalable quantum systems that perform optimally in noisy environments.

Conclusion

In summary, this paper provides a thorough and sophisticated approach to the implementation of a continuous set of two-qubit gates, emphasizing hardware efficiency and ease of calibration. By introducing a robust framework for gate parameterization via idle time, and achieving strong numerical fidelity, this research paves the way for more advanced quantum computing solutions. The implications of these findings resonate with the ongoing evolution of quantum hardware towards fault-tolerant and large-scale quantum computation.