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Efficiently Synthesizing Lowest Cost Rewrite Rules for Instruction Selection (2405.06127v2)

Published 9 May 2024 in cs.LO and cs.AR

Abstract: Compiling programs to an instruction set architecture (ISA) requires a set of rewrite rules that map patterns consisting of compiler instructions to patterns consisting of ISA instructions. We synthesize such rules by constructing SMT queries, whose solutions represent two functionally equivalent programs. These two programs are interpreted as an instruction selection rewrite rule. Existing work is limited to single-instruction ISA patterns, whereas our solution does not have that restriction. Furthermore, we address inefficiencies of existing work by developing two optimized algorithms. The first only generates unique rules by preventing synthesis of duplicate and composite rules. The second only generates lowest-cost rules by preventing synthesis of higher-cost rules. We evaluate our algorithms on multiple ISAs. Without our optimizations, the vast majority of synthesized rewrite rules are either duplicates, composites, or higher cost. Our optimizations result in synthesis speed-ups of up to 768x and 4004x for the two algorithms.

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References (31)
  1. Code generation using tree matching and dynamic programming. ACM Transactions on Programming Languages and Systems (TOPLAS), 11(4):491–516, 1989.
  2. Recursive program synthesis. In Computer Aided Verification: 25th International Conference, CAV 2013, Saint Petersburg, Russia, July 13-19, 2013. Proceedings 25, pages 934–950. Springer, 2013.
  3. Scaling enumerative program synthesis via divide and conquer. In International conference on tools and algorithms for the construction and analysis of systems, pages 319–336. Springer, 2017.
  4. Creating an agile hardware design flow. In 2020 57th ACM/IEEE Design Automation Conference (DAC), pages 1–6. IEEE, 2020.
  5. Eli Bendersky. A deeper look into the LLVM code generator, Part 1, Feb 2013.
  6. Synthesizing an instruction selection rule library from semantic specifications. In Proceedings of the 2018 International Symposium on Code Generation and Optimization, pages 300–313, 2018.
  7. R. G. Cattell. Automatic derivation of code generators from machine descriptions. ACM Transactions on Programming Languages and Systems (TOPLAS), 2(2):173–190, 1980.
  8. Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks. ACM SIGARCH Computer Architecture News, 44(3):367–379, 2016.
  9. Synthesizing instruction selection rewrite rules from RTL using SMT. In Conference on Formal Methods in Computer-Aided Design (FMCAD), page 139, 2022.
  10. Program synthesis: Challenges and opportunities. Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences, 375(2104):20150403, 2017.
  11. Automatically generating instruction selectors using declarative machine descriptions. ACM Sigplan Notices, 45(1):403–416, 2010.
  12. Peak: A single source of truth for hardware design and verification. arXiv preprint arXiv:2308.13106, 2023.
  13. BEG: A generator for efficient back ends. ACM Sigplan Notices, 24(7):227–237, 1989.
  14. A mathematical introduction to logic. Elsevier, 2001.
  15. A retargetable C compiler: Design and implementation. Addison-Wesley Longman Publishing Co., Inc., 1995.
  16. Engineering a simple, efficient code-generator generator. ACM Letters on Programming Languages and Systems (LOPLAS), 1(3):213–226, 1992.
  17. Mahadevan Ganapathi. Retargetable code generation and optimization using attribute grammars. PhD thesis, 1980. AAI8107834.
  18. Description-driven code generation using attribute grammars. In Proceedings of the 9th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, POPL ’82, page 108–119, New York, NY, USA, 1982. Association for Computing Machinery.
  19. PySMT: A solver-agnostic library for fast prototyping of SMT-based algorithms. In SMT Workshop 2015, 2015.
  20. A new method for compiler code generation. In Proceedings of the 5th ACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages, POPL ’78, page 231–254, New York, NY, USA, 1978. Association for Computing Machinery.
  21. Synthesis of loop-free programs. In Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, 2011.
  22. A new golden age for computer architecture. Commun. ACM, 62(2):48–60, January 2019.
  23. Generating machine specific optimizing compilers. In Proceedings of the 23rd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pages 219–229, 1996.
  24. A domain-specific architecture for deep neural networks. Communications of the ACM, 61(9):50–59, 2018.
  25. Donald E. Knuth. The Art of Computer Programming, Volume 4, Fascicle 3: Generating All Combinations and Partitions. Addison-Wesley Professional, 2005.
  26. Near-optimal instruction selection on DAGs. In Proceedings of the 6th Annual IEEE/ACM International Symposium on Code Generation and Optimization, pages 45–54, 2008.
  27. Canonical narrowing with irreducibility and SMT constraints as a generic symbolic protocol analysis method. In Rewriting Logic and Its Applications: 14th International Workshop, WRLA 2022, Munich, Germany, April 2–3, 2022, Revised Selected Papers, pages 45–64. Springer, 2022.
  28. APEX: A framework for automated processing element design space exploration using frequent subgraph analysis. In Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 3, pages 33–45, 2023.
  29. Boolector 2.0. J. Satisf. Boolean Model. Comput., 9(1):53–58, 2014.
  30. Optimal code generation for expression trees: An application BURS theory. In Proceedings of the 15th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pages 294–308, 1988.
  31. Plasticine: A reconfigurable architecture for parallel patterns. ACM SIGARCH Computer Architecture News, 45(2):389–402, 2017.
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Authors (7)
  1. Ross Daly (5 papers)
  2. Caleb Donovick (4 papers)
  3. Caleb Terrill (5 papers)
  4. Jackson Melchert (5 papers)
  5. Priyanka Raina (11 papers)
  6. Clark Barrett (86 papers)
  7. Pat Hanrahan (18 papers)
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