Optimizing T and CNOT Gates in Quantum Ripple-Carry Adders and Comparators (2401.17921v3)

Abstract: The state of the art of quantum circuits using the ripple-carry strategy for the addition and comparison of two n-bit numbers is presented, as well as optimizations in the Clifford+T gate set, both in terms of CNOT-depth and T-depth, or CNOT-count and T-count. In particular, we consider the adders presented by Cuccaro et al. and Takahashi et al., and exhibit an adder with a T-depth of 3n and a CNOT-depth of 8n, while without optimization of the original circuits, a T-depth of 6n is expected. Note that we have focused here on quantum ripple-carry adders using at most one ancilla, without any approximation of the 3-qubit gates involved (Toffoli, Peres and TR) or any strategy involving a measurement.