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Robust Implementable Regulator Design of General Linear Systems (2102.13413v1)

Published 26 Feb 2021 in math.OC, cs.SY, and eess.SY

Abstract: Robust implementable output regulator design approaches are studied for general linear continuous-time \mbox{systems} with periodically sampled measurements, consisting of both the regulation errors and extra measurements that are generally non-vanishing in steady state. A digital regulator is first developed via the conventional emulation-based approach, rendering the regulation errors asymptotically bounded with a small sampling period. We then develop a hybrid design framework by incorporating a generalized hold device, which transforms the original problem into the problem of designing an output feedback controller fulfilling two conditions for a discrete-time system. We show that such a controller can always be obtained by designing a discrete-time internal model, a discrete-time washout filter, and a discrete-time output feedback stabilizer. As a result, the regulation errors are shown to be globally exponentially convergent to zero, while the sampling period is fixed but can be arbitrarily large. This design framework is further developed for a multi-rate digital regulator with a large sampling period of the measurements and a small control execution period.

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