Neuromorphic computing with multi-memristive synapses (1711.06507v2)

Abstract: Neuromorphic computing has emerged as a promising avenue towards building the next generation of intelligent computing systems. It has been proposed that memristive devices, which exhibit history-dependent conductivity modulation, could efficiently represent the synaptic weights in artificial neural networks. However, precise modulation of the device conductance over a wide dynamic range, necessary to maintain high network accuracy, is proving to be challenging. To address this, we present a multi-memristive synaptic architecture with an efficient global counter-based arbitration scheme. We focus on phase change memory devices, develop a comprehensive model and demonstrate via simulations the effectiveness of the concept for both spiking and non-spiking neural networks. Moreover, we present experimental results involving over a million phase change memory devices for unsupervised learning of temporal correlations using a spiking neural network. The work presents a significant step towards the realization of large-scale and energy-efficient neuromorphic computing systems.

• The paper presents a novel multi-memristive synaptic architecture that mitigates limited dynamic range and non-linearity in PCM devices.
• It employs a counter-based arbitration scheme to reduce variability, achieving over 90% classification accuracy in ANNs and improved performance in SNNs.
• The research paves the way for scalable, energy-efficient neuromorphic systems with robust fault tolerance and enhanced synaptic precision.

Neuromorphic Computing with Multi-Memristive Synapses

The paper titled "Neuromorphic Computing with Multi-Memristive Synapses" explores the field of neuromorphic computing, which aims to emulate the functionalities of biological neural systems using memristive devices. This research addresses the challenges associated with implementing these synaptic structures in artificial neural networks (ANNs) and spiking neural networks (SNNs) by proposing a novel architecture that leverages multiple memristors to enhance accuracy and efficiency.

Memristive Devices in Neuromorphic Systems

Memristive devices have garnered attention for their potential to emulate synaptic weights due to their history-dependent conductivity modulation. However, precise control over their conductance across a broad dynamic range remains difficult. The proposed multi-memristive synaptic architecture addresses these limitations by utilizing multiple devices per synapse, thereby extending the dynamic range and resolution. This architecture employs a counter-based arbitration scheme for device selection, enhancing system reliability without significantly increasing circuit complexity.

Methodology and Results

The paper provides an exhaustive exploration of both theoretical models and experimental implementations, focusing on phase change memory (PCM) devices. These devices, integrated into a prototype chip, were characterized to understand their conductance response under varying conditions. Experiments demonstrated that using multi-memristive synapses mitigates the effects of limited dynamic range and asymmetrical conductance changes, achieving a more linear and scalable synaptic weight adjustment. Notably, the paper illustrates the successful training of ANNs and SNNs for handwritten digit classification and identifies benefits in temporal correlation detection within SNNs.

The conductance characteristics of PCM devices, including potentiation and depression, were examined comprehensively. The paper acknowledges the inherent variability and non-linearity of PCM devices but shows that these can be partially addressed by the multi-memristive approach that averages the conductance values across several devices. The research reports promising results, with classification accuracies exceeding 90% in ANNs and significant improvements in SNNs using the proposed synaptic architecture.

Implications and Future Directions

The implications of the proposed architecture are significant for the development of scalable and energy-efficient neuromorphic systems. By demonstrating compatibility with crossbar arrays, this approach offers a potential pathway for integrating large-scale neural networks while minimizing power consumption and maximizing synaptic precision. The architecture's inherent capacity to handle device failures and variability underscores its robustness.

Future research could explore optimizing the memristive device materials to further improve conductance control and reduce variability. Additionally, expanding the architecture to incorporate other types of memristive technologies could provide insights into its adaptability and performance across diverse applications. The exploration of binary significance in device-based weights offers an intriguing direction, potentially enhancing precision and computational efficiency.

In conclusion, this paper represents a step forward in neuromorphic computing, providing a practical solution to some of the longstanding challenges in implementing memristive synapses. The multi-memristive synaptic architecture paves the way for more robust and efficient artificial neural systems, which are closer to fulfilling the promise of brain-like processing capabilities with unprecedented energy efficiency.