Breaking the Loss Limitation of On-chip High-confinement Resonators
This paper by Xingchen Ji et al. addresses one of the significant challenges in advancing on-chip optical resonators: overcoming optical losses while maintaining high confinement and a high-quality factor (Q). On-chip resonators, especially those utilizing silicon nitride (Si₃N₄), have potent applications in metrology, sensing, frequency comb generation, and optical clocks. However, these resonators historically suffer from higher losses compared to their bulkier crystalline counterparts. Through a combination of surface smoothing techniques and optimized lithography processes, the researchers report achieving unprecedentedly high Q factors, significantly reducing optical losses for on-chip high-confinement resonators.
Key Advancements and Results
The paper elucidates a methodology to significantly curtail the scattering-induced losses in high-confinement Si₃N₄ ring resonators. Notably, it reports achieving Q factors of 37 million for a 2.5 µm wide ring and approximately 67 million for a 10 µm wide ring, underlining a systematic path to achieve these metrics by addressing surface roughness. Measurement revealed that the loss limited by material absorption was as low as 0.13 dB/m, corresponding to an absorption-limited Q of at least 170 million. This is achieved by fabricating resonators with optimized technique combinations—specified plasma etching adjustments to eliminate sidewall polymer residues and chemical-mechanical polishing (CMP) to reduce top surface roughness.
The researchers also highlight a novel application where reduced optical losses lead to lowered thresholds for optical parametric oscillation; this is demonstrated with sub-milliwatt threshold powers, which are notably the lowest reported for planar nonlinear platforms to date. The paper further presents extensive comparative analysis with other platforms and materials, as depicted in Table 1.
Implications and Future Directions
The findings hold significant implications for integrated photonics. By outstripping previous loss limitations related to both surface scattering and bulk material absorption, the work provides a scalable approach to achieving ultra-low-loss on-chip devices. Such advancement is a pivotal step toward realizing compact, high-performance photonic circuits with minimal power requirements—a crucial facet for the development of photonic systems in telecommunications and sensors.
From a theoretical perspective, this work contributes to the broader understanding of loss mechanisms in high-confinement waveguides, providing empirical quantification to isolate scatter-induced from absorption-induced losses. The meticulous process optimization demonstrated here could be adapted across various material platforms, hinting at the possibility of achieving ultra-high-Q resonators beyond Si₃N₄.
Future research can build upon this framework by exploring additional material systems or further refining the fabrication processes to push the boundaries of miniaturization and integration in photonic devices. Moreover, addressing the remaining constraints posed by bottom surface roughness, particularly the cladding/core interface, represents a potential pathway for further reduction of scattering losses, potentially unlocking even higher Q factors and lower power operational thresholds.
Overall, this paper illustrates a significant stride in photonic technology, offering a foundation for future innovations in integrated photonics that demand both high confinement and low losses.