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Energy Efficient and High Performance Current-Mode Neural Network Circuit using Memristors and Digitally Assisted Analog CMOS Neurons (1511.09085v2)

Published 29 Nov 2015 in cs.ET and cs.AR

Abstract: Emerging nano-scale programmable Resistive-RAM (RRAM) has been identified as a promising technology for implementing brain-inspired computing hardware. Several neural network architectures, that essentially involve computation of scalar products between input data vectors and stored network weights can be efficiently implemented using high density cross-bar arrays of RRAM integrated with CMOS. In such a design, the CMOS interface may be responsible for providing input excitations and for processing the RRAM output. In order to achieve high energy efficiency along with high integration density in RRAM based neuromorphic hardware, the design of RRAM-CMOS interface can therefore play a major role. In this work we propose design of high performance, current mode CMOS interface for RRAM based neural network design. The use of current mode excitation for input interface and design of digitally assisted current-mode CMOS neuron circuit for the output interface is presented. The proposed technique achieve 10x energy as well as performance improvement over conventional approaches employed in literature. Network level simulations show that the proposed scheme can achieve 2 orders of magnitude lower energy dissipation as compared to a digital ASIC implementation of a feed-forward neural network.

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Authors (7)
  1. Aranya Goswamy (1 paper)
  2. Sagar Kumashi (1 paper)
  3. Vikash Sehwag (33 papers)
  4. Siddharth Kumar Singh (3 papers)
  5. Manny Jain (1 paper)
  6. Kaushik Roy (265 papers)
  7. Mrigank Sharad (23 papers)
Citations (1)

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