Building logical qubits in a superconducting quantum computing system (1510.04375v1)

Abstract: The technological world is in the midst of a quantum computing and quantum information revolution. Since Richard Feynman's famous "plenty of room at the bottom" lecture, hinting at the notion of novel devices employing quantum mechanics, the quantum information community has taken gigantic strides in understanding the potential applications of a quantum computer and laid the foundational requirements for building one. We believe that the next significant step will be to demonstrate a quantum memory, in which a system of interacting qubits stores an encoded logical qubit state longer than the incorporated parts. Here, we describe the important route towards a logical memory with superconducting qubits, employing a rotated version of the surface code. The current status of technology with regards to interconnected superconducting-qubit networks will be described and near-term areas of focus to improve devices will be identified. Overall, the progress in this exciting field has been astounding, but we are at an important turning point where it will be critical to incorporate engineering solutions with quantum architectural considerations, laying the foundation towards scalable fault-tolerant quantum computers in the near future.

• The paper presents a layered architecture that integrates physical qubits with logical encoding using rotated surface codes for effective error correction.
• It demonstrates superconducting qubits reaching sub-threshold error levels with coherence times (~100 μs) that allow up to 10⁴ operations per cycle.
• The study identifies key challenges such as enhancing qubit connectivity, improving readout fidelity, and refining calibration protocols for scalable quantum computing.

Building Logical Qubits in a Superconducting Quantum Computing System

The paper, "Building logical qubits in a superconducting quantum computing system," by Jay M. Gambetta, Jerry M. Chow, and Matthias Steffen addresses the significant advancements and challenges in realizing logical qubits through superconducting quantum systems. It underscores the transitional landscape of quantum information technology, emphasizing the importance of evolving from theoretical frameworks to practical, scalable quantum computing architectures.

Overview and Core Contributions

The authors discuss the architecture of quantum computing systems based on the rotated surface code (RSC) for error correction. They propose a layered structural approach comprising of both physical and logical qubit layers. The lower physical layer features physical qubits managed through a QEC processor, tasked with implementing error correction codes. The upper logical layer handles encoded qubits and facilitates logical operations necessary for executing quantum algorithms such as Shor's and Grover's algorithms.

Significantly, the authors focus on the challenges and necessary conditions for implementing fault-tolerant quantum computing. They identify the requirements for building a scalable quantum computer, which include well-isolated physical qubits capable of controlled interactions, a fault-tolerant architecture, and the implementation of universal gates necessary for logical qubit operations.

The capability of implementing a fault-tolerant scheme is strongly supported by the rotated surface code, which offers a high error threshold and simplicity in lattice arrangement. Notably, the interaction setup for qubits is proposed using a quantum bus, enhancing the required qubit connectivity for error correction.

Key Findings and Experimental Realizations

The paper details various implementations where superconducting qubits have reached error levels below critical thresholds, supporting concepts of error correction. The results include networks of superconducting qubits demonstrating quantum error correction principles, laying groundwork for scalable implementations.

Key experimental realizations have confirmed that superconducting qubits have achieved coherence times suitable for QEC activities, with coherence times about $\sim 100 \mu$s and up to $10^4$ operations per coherence time. This capability is critical for the next step in demonstrating stable logical qubits and ultimately achieving fault-tolerant quantum memories.

Challenges and Future Outlook

While tremendous progress has been made with superconducting qubits, the paper outlines critical technical challenges that need addressing to scale up quantum systems. These include improving coherence times, achieving higher fidelity in quantum gates, efficient calibration protocols, and addressing the physical layout for integrating many qubits.

Additional challenges mentioned are enhancing the readout fidelity, creating extensible control systems, and ensuring cryogenic system integrity. Moreover, overcoming substrate mode issues and ensuring the Josephson junction reproducibility will be critical as devices scale.

The authors also emphasize the need for new quantum error correction codes and software frameworks to effectively control and operate complex quantum systems. These areas are crucial for mitigating the inherent overhead tied to fault-tolerant quantum operations and for integrating multiple error-correcting codes in practical systems.

Conclusion

This paper articulates both a clear path forward and the remaining hurdles in realizing a scalable quantum computing system using superconducting technology. By effectively addressing the error correction and physical architecture challenges, the paper envisions a trajectory where a medium-sized quantum system could serve as a testbed for QEC, significantly contributing to the eventual construction of a universal quantum computer. Through continued research into the topics such as logical gate structure optimization and augmenting existing qubit architectures, the field of superconducting quantum computing remains a vibrant domain poised for substantial developments.