Realization of Room-Temperature Phonon-limited Carrier Transport in Monolayer MoS2 by Dielectric and Carrier Screening (1510.00830v1)

Abstract: We show that by combining high-k dielectric substrate and high density of charge carriers, Coulomb impurity can be effectively screened, leading to an unprecedented room-temperature mobility of ~150cm2/Vs in monolayer MoS2. The high sample quality enables us to quantitatively extract the mobility components limited by Coulomb impurities, intrinsic and surface optical phonons, and study their scaling with temperature, carrier density and dielectric constant. The excellent agreement between our theoretical analysis and experimental data demonstrates unambiguously that room-temperature phonon-limited transport is achieved in monolayer MoS2, which is a necessary factor for electronic device applications.

• The paper shows that room-temperature phonon-limited carrier transport in monolayer MoS2 is achieved using high-κ dielectric and carrier screening.
• The experimental field-effect transistors achieved mobilities up to 150 cm²/Vs by effectively reducing Coulomb impurity scattering.
• The study validated dielectric engineering with rigorous modeling, highlighting trade-offs with remote phonon interactions to guide future TMD device improvements.

Analysis of Phonon-limited Carrier Transport in Monolayer MoS$_2$

This paper presents a detailed investigation into the charge transport mechanisms in monolayer molybdenum disulfide (MoS$_2$), with a specific emphasis on suppressing Coulomb impurity (CI) scattering through dielectric and carrier screening. The research involved both experimental and theoretical studies to understand and achieve phonon-limited transport at room temperature in MoS$_2$, a milestone that has been elusive in the transition metal dichalcogenide (TMD) field.

Monolayer MoS$_2$ holds promise for nanoelectronic applications due to its advantageous properties, such as a direct bandgap of 1.8 eV and excellent electrostatic control. However, the electron mobility in monolayer MoS$_2$ is typically much lower than the theoretically predicted intrinsic phonon-limited mobility of 200-410 cm$^2$/Vs when measured experimentally. This discrepancy has been attributed to CI, traps, and defects in samples that introduce extrinsic scattering.

The authors address this by employing high-κ dielectrics like hafnium dioxide (HfO$_2$) and aluminum oxide (Al$_2$O$_3$), coupled with carrier screening, to reduce the scattering from CIs. Their experimental setup involved field-effect transistors based on thiol-treated MoS$_2$, which achieved room-temperature mobilities up to approximately 150 cm$^2$/Vs—a significant improvement over standard SiO$_2$-based devices.

The paper's focal point was discerning the mobility contributions from CIs, intrinsic phonons, and remote phonons. It was corroborated through rigorous modeling that the phonon-limited regime could be achieved by adequately engineering the dielectric environment and minimizing CI scattering. The reduction of CI influence was responsible for the record mobility observed, marking a shift in charge transport to being limited primarily by intrinsic and remote phonons rather than extrinsic factors like CI scattering, especially on substrates like HfO$_2$.

Importantly, the results also indicate that the use of high-κ dielectrics presents a trade-off where enhanced screening of CIs also heightens interactions with remote substrate phonons, thereby limiting further mobility gains. Consequently, future research should focus on integrating TMDs with low-κ dielectrics or materials that naturally exhibit low CI densities, such as hexagonal boron nitride (BN), to surpass the current mobility milestones. Materials like BN offer weak remote phonon coupling due to their lesser polar nature, which could allow further exploitation of the intrinsic properties of monolayer MoS$_2$ without the detriments associated with high-κ environments.

The methodology and conclusions drawn from this paper have broad implications for improving carrier mobility in other TMDs like WS$_2$ through similar dielectric engineering strategies. The paper provides a foundational framework for future enhancements in TMD electronics, paving the way for their integration into post-CMOS technologies. Future directions could involve exploring novel dielectric interfaces and combining advanced material manipulation techniques to achieve even more substantial electrical performance enhancements.