LLR-based Successive Cancellation List Decoding of Polar Codes (1401.3753v4)

Abstract: We show that successive cancellation list decoding can be formulated exclusively using log-likelihood ratios. In addition to numerical stability, the log-likelihood ratio based formulation has useful properties which simplify the sorting step involved in successive cancellation list decoding. We propose a hardware architecture of the successive cancellation list decoder in the log-likelihood ratio domain which, compared to a log-likelihood domain implementation, requires less irregular and smaller memories. This simplification together with the gains in the metric sorter, lead to $56\%$ to $137\%$ higher throughput per unit area than other recently proposed architectures. We then evaluate the empirical performance of the CRC-aided successive cancellation list decoder at different list sizes using different CRCs and conclude that it is important to adapt the CRC length to the list size in order to achieve the best error-rate performance of concatenated polar codes. Finally, we synthesize conventional successive cancellation decoders at large block-lengths with the same block-error probability as our proposed CRC-aided successive cancellation list decoders to demonstrate that, while our decoders have slightly lower throughput and larger area, they have a significantly smaller decoding latency.

• The paper introduces an LLR-based SCL decoding method that resolves numerical underflow issues in likelihood computations.
• The paper demonstrates a hardware architecture achieving 56% to 137% higher throughput per unit area compared to existing designs.
• The paper provides theoretical proofs for LLR equivalence and encourages future research into adaptive polar code decoding techniques.

Log-Likelihood Ratio Based Successive Cancellation List Decoding of Polar Codes

The paper, "LLR-Based Successive Cancellation List Decoding of Polar Codes," presents a detailed paper on enhancing the successive cancellation list (SCL) decoding of polar codes by adopting the log-likelihood ratio (LLR) domain for path metric computation, along with an efficient hardware architecture. This approach addresses the numerical instability issues commonly associated with likelihood-based computations, offering more stable and hardware-friendly solutions.

Methodological Advancements

The authors encapsulate the SCL decoding process within the LLR domain, thereby enabling a stable and consistent framework for the implementation. The central contribution of the paper is the proof that the SCL decoding algorithm can be reformulated solely in the LLR domain, where path competitions are accurately resolved using path metrics computed with LLRs. This formulation alleviates underflow issues encountered in likelihood computations, significantly simplifying sorting tasks in the decoding process.

Key Findings and Numerical Results

The proposed architecture outperforms existing solutions in hardware efficiency. Specific numerical results highlight that their design achieves 56% to 137% higher throughput per unit area compared to current architectures. This remarkable performance gain is attributed to the LLR-based computation which mandates less irregular memory, reducing the overall hardware complexity and area.

Hardware Architecture

A significant portion of the paper is devoted to describing the hardware design of the proposed decoder, which integrates the novel LLR-based path metric calculations. The design employs $L$ parallel SC decoder cores, efficiently managed using a copy-on-write mechanism that minimizes redundant data handling. This architecture leverages a simplified sorting mechanism, employing a pruned radix-$2L$ metric sorter that optimally exploits the characteristics of LLR-based path metrics, further minimizing computational overheads.

Theoretical Implications

The theoretical implication of this paper is noteworthy. By mathematically establishing the equivalence of likelihood-based path comparison to LLR-based path metric, the research extends the application of SCL decoding to a more stable computational environment. This also supports the notion that theoretical advancements in channel coding can directly translate to practical, scalable hardware solutions.

Implications for Future Research

The results from this paper set a concrete foundation for future explorations in channel coding. Researchers are encouraged to explore variable node decomposition techniques and adaptive bit allocations in polar codes, potentially enhancing decoding efficiency further. The successful application of LLR domain computations could also be considered for other advanced decoding schemes, including turbo and LDPC codes.

Practical Implications and Future Developments

Practically, systems utilizing polar codes, such as 5G communications, stand to benefit from this research through more efficient and robust decoding processes. Future developments could explore integrating this method with advanced modulation schemes and multi-input multi-output (MIMO) systems to further exploit the gains offered by LLR-based decoding.

Conclusion

In conclusion, this paper offers a significant leap forward in the field of decoding algorithms for polar codes, providing an efficient, scalable, and robust alternative to existing methods. The transition to the LLR domain for SCL decoding is not merely an optimization technique but a pivotal shift with profound implications for both theoretical channel coding and practical hardware implementations. As communication standards continue to evolve, such innovations will undoubtedly shape the foundational technologies underpinning next-generation communication systems.