---
title: TP-EP Hybrid Parallelism
url: https://www.emergentmind.com/topics/tp-ep-hybrid-parallelism
type: topic
---

# TP-EP Hybrid Parallelism

TP-EP hybrid parallelism refers to the combined use of tensor parallelism (TP) and expert parallelism (EP) in the distributed serving and training of large-scale Mixture-of-Experts (MoE) models, particularly in multi-GPU, multi-node, and heterogeneous accelerator environments. This strategy systematically addresses key bottlenecks associated with pure TP (high communication cost, limited inter-node scaling) and pure EP (load imbalance, memory hot-spots), enabling scalable and efficient inference or training for models containing billions to trillions of parameters [2601.08800][2507.07120][2509.09420][2508.19373].

## 1. Fundamental Concepts and Motivations

Tensor parallelism operates by partitioning each weight tensor (such as the input/output projections in the attention or FFN modules) across a number of devices $d_{\text{TP}}$, with device-local computation requiring an all-reduce (AR) communication phase to synchronize the partial outputs. In contrast, expert parallelism partitions the set of experts across devices $d_{\text{EP}}$, dispatching each token's hidden state to its top-$k$ activated experts and recombining through an all-to-all (A2A) operation. 

Pure TP exhibits poor inter-node scalability due to bandwidth constraints on AR operations, as AR latency grows significantly when $d_{\text{TP}}$ exceeds the number of devices per node. EP, while able to scale to more nodes, introduces token-to-expert load imbalance as $d_{\text{EP}}$ rises, and incurs substantial multi-round A2A latency that is similarly dominated by inter-node link bandwidth.

The hybrid TP-EP approach is motivated by the observation that balancing tensor and expert sharding allows for selective mitigation of these disadvantages. By fusing or compositing these parallelism dimensions, hybrid TP-EP mappings can maximize compute utilization and minimize communication cost, especially in the context of MoE architectures deployed on modern heterogeneous clusters or near-memory-processing (NMP) accelerators [2601.08800][2509.09420].

## 2. Algorithmic Realizations and Communication Pipelines

A central contribution in recent systems such as MixServe is a fused AR-A2A communication algorithm for hybrid TP-EP execution [2601.08800]. This approach decouples the AR phase into its constituent Reduce-Scatter (RS) and All-Gather (AG) steps, and interleaves RS with A2A in a three-stage RS–A2A–AG pipeline:

- **RS**: Within each node, a local reduce-scatter aggregates partial outputs.
- **A2A**: Tokens are dispatched across nodes for expert execution (inter-node all-to-all).
- **AG**: Each node completes with an all-gather to reconstruct the full output shards.

This scheduling is accomplished via non-blocking asynchronous communication primitives (e.g., `isend`/`irecv` in NCCL/HCCL), with the intent of overlapping intra-node RS (which leverages high-bandwidth NVLink/HCCS) and inter-node A2A (bottlenecked by InfiniBand/RoCE), as these operate on disjoint buffers and network paths.

The fused communication cost, under perfect overlap, reduces to:
$$
T_{\text{fused}} = \max\{T_{\text{RS}}, T_{\text{A2A}}\} + T_{\text{AG}}
$$
which can save up to one RS stage in the latency critical path, delivering up to $3.8\times$ TTFT speedups and $50.3\%$ higher throughput compared to baselines [2601.08800].

Alternate realizations, such as the Helix parallelism framework [2507.07120], further decouple TP and EP across attention and FFN/MoE phases. During attention, dedicated KV-parallelism sharding eliminates redundant KV cache copies, while FFN/MoE phases use the full GPU pool in a lattice of TP×EP grids, reducing per-GPU DRAM loads and enabling further scaling.

## 3. Automatic Strategy Selection and Hybrid Optimization

State-of-the-art hybrid TP-EP systems deploy systematic analytic or search-based optimizers to select the optimal decomposition of parallelism factors ($d_{\text{TP}}, d_{\text{EP}}, d_{\text{DP}}, d_{\text{PP}}$):

- **Analytical cost models** compute token computation and communication latency per layer, estimating
  $$
  \tau(d_{\text{TP}}, d_{\text{EP}}, d_{\text{DP}}) \approx
    \frac{\Psi}{d_{\text{TP}} \cdot d_{\text{EP}} \cdot (b/d_{\text{DP}})}
  $$
  and
  $$
  \lambda(d_{\text{TP}}, d_{\text{EP}}, d_{\text{DP}}) = 2T_{\text{AR}} + 2T_{\text{A2A}}
  $$
  under subject-specific memory and topology constraints.

- **Search algorithms** (e.g., integer linear programming (ILP) [2508.19373]) or linear programming plus Bayesian optimization for link-level placement [2509.09420]) enumerate feasible strategies, score them with simulation-derived or empirically fitted models, and select the configuration optimizing for target metrics (e.g., minimizing TTFT or maximizing throughput).

- **Dynamic adaptation**: HD-MoE [2509.09420] and HAP [2508.19373] incorporate online adaptation by recomputing optimal hybrid placements or switching parallelism modes between prefill and decode, in response to workload or activation pattern changes.

The runtime system typically consists of modules for profiling, analysis, partitioning/sharding, communication orchestration, and integration with model serving frontends (e.g., vLLM, Tutel, or DeepSpeed-FastGen).

## 4. Empirical Performance and Representative Results

Empirical evaluation on current-generation hardware and models consistently demonstrates substantial gains over static pure-TP or pure-EP baselines. Selected results from MixServe [2601.08800], HD-MoE [2509.09420], and HAP [2508.19373] are presented:

| System/Model     | TTFT Speedup | ITL Speedup | Throughput Improvement |
|------------------|-------------|-------------|-----------------------|
| MixServe@Qwen3/H20 | 1.24×–3.80× | 1.03×–1.66× | 5.2%–50.3%            |
| HD-MoE@Qwen2      | 1.75×       | —           | —                     |
| HAP@Mixtral-8×7B (A100) | 1.77× | —         | —                     |

Notably, these speedups are achieved across diverse hardware (NVIDIA H20/GB200, Ascend 910B NPUs, 3D NMP accelerators), and for models ranging from hundreds of billions to multi-trillion parameters. Communication overhead is markedly reduced (up to $45\%$ compared to TP alone), and systems remain robust to variations in hardware interconnect speeds and expert activation skew [2601.08800][2509.09420][2508.19373].

## 5. Design Trade-offs and Systemic Limitations

Hybrid TP-EP approaches introduce auxiliary complexity and resource overhead:

- **Buffer overhead**: Fused AR–A2A–AG pipelines require additional staging buffers of $\mathcal{O}(b \cdot s \cdot h \cdot n_{\text{proc}})$.
- **Strategy selection complexity**: Enumerating all feasible hybrid tuples can be computationally expensive at extreme scales ($\mathcal{O}(\text{poly}(n_{\text{node}} \cdot n_{\text{proc}}))$), motivating pruning or hierarchical grouping at the trillion-parameter and exascale regime [2601.08800].
- **Hardware sensitivity**: The benefit of hybrid approaches is context-dependent:
  - When communication is much slower than compute, pure EP can be sufficient;
  - When compute is the bottleneck (e.g. large $IS$, small model), pure TP may suffice;
  - For balanced or bandwidth-constrained cases, hybrid mapping is most effective.
- **Dynamic adaptation cost**: Online reoptimization and LP/BO solver runtimes can be significant if hardware or activation patterns shift very frequently [2509.09420]. HAP's requirement for micro-benchmark-driven regression models also imposes operational overhead [2508.19373].

## 6. Extensions, Applications, and Future Directions

Hybrid TP-EP parallelism is an enabler for serving and training efficiency in the context of ultra-large MoE LLMs, particularly where cluster heterogeneity, batch size variability, and model structure diversity preclude fixed parallelism recipes. Current research points to promising directions:

- Extension to hierarchical clusters (intra/inter-rack, GPU/NPU heterogeneity) [2601.08800];
- Integration with advanced request-level scheduling and pipeline disaggregation [2601.08800];
- Application to near-memory, tile-based, and edge accelerator clusters, harnessing automatic mapping and online adaptation for both computation and NoC-aware communication [2509.09420];
- Dynamic module-level reconfiguration and switching of hybrid strategies across workload phases (prefill, decode), enabling further efficiency gains for variable context and generation lengths [2508.19373][2507.07120].

A plausible implication is that as LLM and MoE deployment scales continue to outpace interconnect scaling, advanced TP-EP hybridization—supported by automated, hardware-aware optimization and runtime adaptation—will remain a key strategy for closing the compute-communication gap, sustaining feasible throughput and latency for large-scale inference and training.

Source: https://www.emergentmind.com/topics/tp-ep-hybrid-parallelism