---
title: Task Mapping Optimization
url: https://www.emergentmind.com/topics/task-mapping-optimization-tmo
type: topic
---

# Task Mapping Optimization

Task Mapping Optimization (TMO) denotes, in the cited literature, a family of optimization problems in which logical tasks, tensor iterations, processes, destination classes, or spatial activities are assigned to execution resources or spatial receptacles under explicit performance models. The objective varies by domain—minimizing slowest-PE completion time in NoC-based DNN accelerators, minimizing latency, energy, or energy-delay product in accelerator mapspaces, minimizing DAG makespan on heterogeneous systems, maximizing simulator-defined throughput in robotic sorting, or minimizing communication distance on parallel topologies—but the common structure is an assignment problem constrained by hardware, communication, and resource limits [2411.12710, 2602.15172, 2502.19745, 2510.03472, 1804.09798].

## 1. Scope and terminology

In the cited work, the term *task mapping* is not restricted to one computational abstraction. In heterogeneous DAG scheduling, a mapping is a function $\phi: V \to P$ from tasks to processing units; in process mapping on supercomputers it is a placement of tasks or processes onto coordinates in a machine topology; in GPU tensor compilers it is a mapping from workers to ordered sequences of iteration-space tasks; and in robotic sorting it is a destination-to-chutes assignment encoded as a binary matrix [2502.19745, 2005.10413, 2210.09603, 2510.03472].

| Domain | Mapping object | Representative formulation |
|---|---|---|
| NoC-based DNN accelerator | Uneven task counts across PEs | Minimize slowest-PE finish time [2411.12710] |
| Accelerator mapspace search | Full mapping $(dp, df, ts)$ | Minimize $L$, $E$, or $E \cdot L$ [2602.15172] |
| Heterogeneous DAG execution | Task-to-device assignment $\phi$ | Minimize makespan $C(\phi)$ [2502.19745] |
| GPU tensor programming | Worker-to-task-sequence mapping $f$ and layouts | Minimize end-to-end latency [2210.09603, 2504.16214] |
| Robotic sorting systems | Destination-to-chutes mapping $\theta$ | Maximize throughput $F(\theta)$ [2510.03472] |
| Parallel computers | Process-to-processor placement $\pi$ or $\delta$ | Minimize communication cost or dilation [1804.09798, 2504.01726, 2005.10413] |

The term *task* is therefore domain-relative. In Hidet, the iteration domain is an $m$-dimensional integer grid $\mathbf T$, and a task mapping is a function $f:\mathbf W_n \to \mathsf{Seq}(\mathbf T)$ assigning each worker an ordered list of tasks [2210.09603]. In the robotic-sorting formulation, the mapping variable is instead a chute-assignment matrix $x \in \{0,1\}^{M \times (N+1)}$ subject to coverage constraints over real destinations [2510.03472]. In the PDE-based robotic-ensemble formulation, the “mapping task” is the identification of an unknown spatial coefficient $H_\Gamma(x)$ in an advection-diffusion-reaction model rather than placement on processors [1711.11018]. This suggests that TMO is better understood as an assignment-and-cost-model paradigm than as a single algorithmic template.

## 2. Canonical mathematical formulations

A recurrent formulation in hardware mapping minimizes the completion time of the bottleneck resource. Chen et al. define per-PE travel time as
$$
T_{\text{travel},k} = T_{\text{req},k} + T_{\text{mem},k} + T_{\text{resp},k} + T_{\text{comp},k},
$$
and then solve
$$
\min_{x_1,\dots,x_N} \;\max_{1\le k\le N}\bigl(T_{\text{travel},k}\,x_k\bigr)
\quad \text{s.t.}\quad
\sum_{k=1}^N x_k = T_{\text{all}},\quad x_k\in\mathbb{Z}_{\ge0}.
$$
Under equalized finish time $C$, the closed-form assignment becomes
$$
x_k = \frac{T_{\text{all}}}{\sum_{i=1}^N \frac{1}{T_{\text{travel},i}}}\;\frac{1}{T_{\text{travel},k}},
$$
so the ideal rule is $x_k \propto 1/T_{\text{travel},k}$ [2411.12710].

In heterogeneous DAG mapping, the objective is makespan minimization under computation and communication delays. With $t_{\text{start}}(v)$ defined as the maximum over predecessors and $t_{\text{finish}}(v)=t_{\text{start}}(v)+c_{v,\phi(v)}$, the global objective is
$$
C(\phi)=\max_{v\in V} t_{\text{finish}}(v).
$$
A related MILP-based model expresses per-task execution time on device $p$ as
$$
t_{i,p} = \frac{c_i D_i}{s_p((1-p_i)+p_i r_p)},
$$
and defines device-local compute and communication aggregates whose maximum yields the makespan surrogate $C(X)$ [2502.19745, 2208.06321].

In topology-aware process mapping, the dominant objective is weighted communication distance. One formulation minimizes
$$
\mathcal C(\pi)=\sum_{(u,v)\in E} w_{uv}\; d\bigl(\pi(u),\pi(v)\bigr),
$$
with $d$ taken as mesh or torus distance; another uses
$$
J(C,D,\pi)=\sum_{\{u,v\}\in E} C_{uv}\cdot D_{\pi(u),\pi(v)},
$$
under an $\epsilon$-balance constraint on block weights; and the 3-D-topology workflow measures quality through “dilation”,
$$
D(\delta)=\sum_{(i,j)\in E_{\text{app}}} d(\delta(i),\delta(j))\cdot w(i,j).
$$
These objectives make locality explicit and separate mapping quality from pure workload balance [1804.09798, 2504.01726, 2005.10413].

In accelerator mapspace search, the mapping itself is a composite object. TCM defines a full mapping as $(dp, df, ts)$, where dataplacement $dp$ specifies which tensor tiles are held at which memory levels and in what order, dataflow $df$ is a loop ordering consistent with $dp$, and tile shapes $ts=\{b_1,\dots,b_R\}$ choose tiling factors. The optimized objectives are latency $L$, energy $E$, or energy-delay product $E \cdot L$, with
$$
L = \max\Bigl\{\frac{\text{Total\_MAC\_ops}}{U},\; \forall m\in M:\frac{\text{Accesses}_m}{BW(m)}\Bigr\},
$$
and
$$
E = e_{\text{mac}}\cdot(\text{Total\_MAC\_ops})+\sum_{m\in M}\bigl[\text{Accesses}_m\cdot e_a(m)\bigr].
$$
This formulation makes data reuse, bandwidth limits, and memory capacity first-class constraints [2602.15172].

## 3. Algorithmic paradigms

One major TMO paradigm is measurement-driven online balancing. In the NoC-based DNN accelerator method, exact $T_{\text{travel},k}$ would require a full profiling run, so the authors introduce a sampling window of $S$ tasks per PE. The measured average
$$
T_{s,k}=\frac{\text{measured total time for }S\text{ tasks}}{S}
$$
is then substituted into
$$
x_k = S + \frac{T_{\text{rem}}}{\sum_{i=1}^N \frac{1}{T_{s,i}}}\;\frac{1}{T_{s,k}},
$$
with fallback to row-major mapping when $T_{\text{all}}<N\,S$ [2411.12710]. The distinctive feature is not exhaustive search but ratio correction using dynamic congestion information.

A second paradigm is exact or guaranteed-optimal mapspace search by aggressive pruning. TCM introduces “dataplacement” as a new concept and then eliminates redundant and suboptimal mappings through redundant-dataflow pruning, non-helpful-loop pruning, tile-shape pruning, and partial-tile-shape pruning. The high-level algorithm is branch and bound over dataplacements, nonredundant dataflows, and divisibility-consistent tile shapes, with model currying so that $dp+df$ are symbolically resolved once and tile shapes are then evaluated numerically at high speed [2602.15172].

A third paradigm is decomposition-based greedy remapping for large heterogeneous DAGs. The series-parallel method first constructs a forest of decomposition trees for general DAGs in $O(m)$ time and $O(n+m)$ space, then forms a candidate set $S$ containing single-task subgraphs and decomposition-induced subgraphs, and finally performs globally evaluated best-improvement remapping. Each candidate move is assessed by recomputing the deterministic makespan model $C(\phi)$ in $O(m)$ time, and the greedy loop terminates because $C(\cdot)$ strictly decreases [2502.19745].

A fourth paradigm appears in compiler-oriented TMO, where the mapping problem is embedded into program synthesis. In Hidet, task mappings are built from the atomic primitives $\mathsf{repeat}$ and $\mathsf{spatial}$ and their composition; this replaces a purely loop-oriented scheduling interface with explicit computation assignment and ordering [2210.09603]. Hexcute goes further by converting task mapping and layout synthesis into a type-inference problem over thread-value layouts $f_v$ and shared-memory layouts $m_s$. Constraint propagation, anchor selection, and limited DFS enumeration over legal copy instructions together synthesize a mapping that is both functionally correct and latency-oriented [2504.16214].

A fifth paradigm is hierarchical or geometric partitioning for communication minimization. Recursive geometric bisection simultaneously partitions the task graph and processor coordinate space; hierarchical multisection recursively partitions the communication graph according to a hardware hierarchy $H=a_1:a_2:\dots:a_\ell$ and then assigns final blocks lexicographically to PEs. Both methods exploit structure in the topology rather than treating placement as an unstructured combinatorial search [1804.09798, 2504.01726].

## 4. Major application domains

In heterogeneous computing systems, TMO is primarily a makespan-minimization problem over compute heterogeneity, communication costs, and occasionally streamability. The MILP framework for data-intensive heterogeneous systems models each logical task by input-memory, computation, and output-memory nodes, accounts for bus bandwidths through $d_{i,p,q}=D_i/\min\{b_{\text{mem}(p)},b_{\text{mem}(q)},b_{p,q}\}$, and incorporates parallelizable fractions $p_i$ and streamability factors $\sigma_i$ for FPGA-style pipelines [2208.06321]. The series-parallel decomposition method targets CPUs, GPUs, FPGAs, and AI units, and explicitly emphasizes that streaming aspects of FPGAs are generally not considered by many prior task-mapping approaches [2502.19745].

In accelerator modeling and tensor compilers, TMO becomes deeply entangled with the memory hierarchy and low-level execution semantics. TCM optimizes dataplacement, dataflow, and tile shapes for DNN accelerators; Hidet defines task mappings as programmable computation assignment and ordering; and Hexcute jointly synthesizes task mappings and memory layouts for copy, mma, elementwise, and reduce operators. In this subfield, the distinction between scheduling, placement, and layout is intentionally blurred, because the choice of thread-value layout or memory layout is itself part of the mapping decision [2602.15172, 2210.09603, 2504.16214].

In robotic and physical systems, TMO acquires a spatial or logistical interpretation. In robotic sorting systems, the decision variable is a destination-to-chutes mapping $\theta$, and mapping quality is interdependent with robot target assignment, path planning, chute closures, and downstream human processing. The throughput objective is evaluated only through simulation, making the problem a black-box combinatorial optimization [2510.03472]. In the PDE-based robotic-ensemble formulation of Elamvazhuthi et al., the mapping stage is a convex inverse problem over the relaxed admissible set
$$
S_{ad}=\{H\in L^2(\Omega):0\le H(x)\le1\ \text{a.e.}\},
$$
followed by a bilinear optimal control problem for coverage; this broadens TMO from resource placement to spatial inference and control [1711.11018].

In large-scale parallel computing, TMO is frequently called *process mapping*. The central goal is to place frequently communicating tasks near one another in mesh, torus, or hierarchical topologies, with explicit concern for sparse allocations, wrap-around effects, bisection bandwidth, and link congestion heuristics [1804.09798]. Shared-memory hierarchical multisection emphasizes homogeneous hardware hierarchies and $\epsilon$-balanced partitions, while the 3-D-topology workflow treats mapping as an explicit optimization stage between trace extraction and trace-driven simulation [2504.01726, 2005.10413].

## 5. Evaluation criteria and empirical findings

Reported gains are strongly domain-specific, because the evaluation targets differ: latency, energy, EDP, throughput, makespan improvement $\Delta$, dilation, communication time, or end-to-end runtime. The following summary therefore compares methods only within their native formulations.

| Representative system | Reported metric | Reported outcome |
|---|---|---|
| Travel time-based NoC mapping [2411.12710] | Single-layer and full-network speedup | Up to 12.1%; 10.37% vs. row-major; 8.17% with sampling window 10 |
| TCM [2602.15172] | Search-space reduction and optimality | Up to 32 orders of magnitude; feasible runtime $<1$ min; prior works 21% higher EDP even at $1000\times$ runtime |
| SP-decomposition TMO [2502.19745] | Makespan improvement and runtime | $\Delta \approx 20$–25% on SP graphs; milliseconds instead of seconds/minutes |
| Hidet [2210.09603] | End-to-end inference speed and tuning | Up to 1.48x, 1.22x on average; tuning time reduced by 20x and 11x |
| Hexcute [2504.16214] | Mixed-type kernel and end-to-end speedup | 1.7-11.28$\times$; up to 2.91$\times$ |
| WAANSO [2004.03462] | Energy and performance | 19% energy efficiency improvement; 65.86% performance improvement |

Additional studies reinforce the importance of topology-aware placement. Recursive geometric and ordering strategies on parallel computers reduced communication time up to 75% relative to MiniGhost’s default mapping on 128K cores of a Cray XK7 with sparse allocation, and reduced communication time up to 31% for E3SM/HOMME on 32K cores of an IBM BlueGene/Q with contiguous allocation [1804.09798]. In the 3-D-topology study, CG on torus reduced MPI point-to-point cost from approximately $1\,200$ s with sweep to approximately $700$ s with Peano or PaCMap, while AMG and LULESH showed little end-to-end sensitivity because non-blocking MPI hid communication latency [2005.10413].

Robotic sorting provides a different empirical profile. In Setup 3, throughput was $18.12 \pm 0.04$ for Cluster Greedy, $21.51 \pm 0.13$ for Min-dist Greedy, $27.05 \pm 0.05$ for EA, and $26.39 \pm 0.03$ for EA w/ Greedy init, with corresponding recirculation rates of $1.36\% \pm 0.03\%$, $2.26\% \pm 0.05\%$, $1.20\% \pm 0.03\%$, and $1.33\% \pm 0.02\%$ [2510.03472]. The key point is that mapping quality in this setting is measured operationally, not through a closed-form surrogate.

## 6. Limitations, misconceptions, and emerging directions

A recurrent misconception is that “balanced” mapping means equal task counts or distance-based placement. The travel-time formulation shows the opposite: row-major mapping had unevenness $\rho = 25.92\%$ end-to-end, distance-based mapping increased imbalance to $58.03\%$, while travel-time mapping reduced $\rho$ to $6.24\%$ in the post-run case and $5.81\%$ with sampling window $S=10$ [2411.12710]. Uneven allocation can therefore be the correct solution when per-resource service times differ.

Another misconception is that communication-cost proxies are universally predictive. The 3-D-topology study found that pre-simulation dilation strongly correlates with simulated MPI and network-model times on homogeneous mesh and torus systems, but on the heterogeneous HAEC Box it must be augmented to account for wireless versus optical hops [2005.10413]. Likewise, the shared-memory hierarchical process-mapping model explicitly notes that $J(C,D,\pi)$ ignores network congestion and contention [2504.01726]. This suggests that the fidelity of the cost model, rather than the optimizer alone, often determines whether a mapping transfers to execution.

Many TMO methods are explicitly static. The series-parallel decomposition approach is “strictly static—dynamic or runtime variability is not handled,” and the heterogeneous-system MILPs are positioned for early exploration, compile-time scheduling, or evaluation of heuristics rather than online adaptation [2502.19745, 2208.06321]. In RSS, the mapping is also static, and the authors note that jointly optimizing TMO with target assignment and MAPF remains open [2510.03472]. In black-box settings the evaluation cost can dominate the search itself: each RSS evaluation takes $O(10^2)$ seconds, and EA with $50\,000$ evaluations runs in $O(10^6)$ sec of simulation [2510.03472].

A plausible implication is that TMO is moving toward richer notions of task relevance and semantic conditioning. An adjacent example is GaussLite, which conditions 3D Gaussian Splatting representation density on a natural-language task specification and allocates seeding density, gradient flow, and scaling by task relevance; however, the provided material explicitly states that the technical sections needed to extract the Task Mapping Optimization formulation were unavailable [2606.30809]. Within the available literature, the dominant trajectory is clearer: TMO increasingly integrates communication structure, memory hierarchy, decomposition structure, and executable cost models rather than treating assignment as a standalone combinatorial subroutine.

Source: https://www.emergentmind.com/topics/task-mapping-optimization-tmo