---
title: Static Phase Reconfiguration
url: https://www.emergentmind.com/topics/static-phase-reconfiguration
type: topic
---

# Static Phase Reconfiguration

Static phase reconfiguration denotes a class of techniques in which a phase-related state is set by non-volatile material switching, a precomputed schedule, a one-time planning decision, or a slow or quasi-static hardware update, rather than by dense continuous tuning. In the cited literature, the phrase spans several technically distinct objects: optical phase profiles in phase-change metasurfaces, synchronized communication phases in optical reconfigurable networks, voltage phasors and user-to-phase assignments in distribution systems, and output-wire assignments or topology modes in reconfigurable converters [1604.01330][2605.26930][1804.02080][2507.05910][2402.03978]. The unifying feature is that the phase-related configuration is deliberately chosen to persist over a useful interval, so that switching overhead, control complexity, or static power consumption is reduced.

## 1. Scope and terminology

A recurring source of ambiguity is that the word “phase” does not denote the same object across the literature. In metasurfaces it usually denotes the optical phase imparted by a unit cell or pixel; in optical reconfigurable networks it denotes synchronized communication phases in a collective schedule; in distribution engineering it can denote either the voltage phasor angle or the discrete connection of single-phase users to phases \(1,2,3\); and in reconfigurable converters it appears through phase-to-wire assignments or three-phase topology changes [1604.01330][2605.26930][1804.02080][1710.10242].

| Domain | Meaning of “phase” | Reconfigured quantity |
|---|---|---|
| Metasurfaces and intelligent surfaces | Optical phase or phase-shift profile | Material state, geometry, or slide-position-dependent composite phase map |
| Optical reconfigurable networks | Synchronized communication phases | Sparse reusable topology states and reconfiguration schedule |
| Distribution systems | Voltage phasor or feeder phase connection | DER dispatch across switches or user phase assignment |
| Power converters | Phase-to-wire or topology association | Switch networks and selector matrices |

“Static” is likewise domain-dependent. In GST and Sb\(_2\)S\(_3\) devices, the written state is non-volatile and remains stable until another optical, thermal, or electrical stimulus is applied [1604.01330][2412.16856]. In low-voltage distribution networks, static phase reconfiguration is explicitly a multi-period planning exercise in which selected consumers are manually re-phased during routine maintenance [2507.05910]. In movable intelligent surfaces, the phase shifts themselves are static, while reconfiguration is achieved by mechanical sliding of a secondary metasurface layer [2511.17058]. In reconfigurable converters for unbalanced systems, the reconfiguration stage is updated on a slow “static” timescale and is not part of the high-frequency modulation loop [2402.03978].

## 2. Non-volatile optical phase control in phase-change metasurfaces

In the all-dielectric GST metasurface of Karvounis et al., the reconfigurable element is a \(300\) nm-thick film of Ge\(_2\)Sb\(_2\)Te\(_5\) patterned into a one-dimensional subwavelength grating with period \(P\) in the range \(750\)–\(950\) nm, slot width \(s\approx130\) nm, nanowire width \(d=P-s\), and height \(h=300\) nm. Under normal incidence with TE polarization, these gratings support high-\(Q\) (\(>20\)) Mie-type resonances in reflection and transmission. The optical response is written through the complex coefficients
\[
r(\omega)=|r(\omega)|e^{i\phi(\omega)}, \qquad t(\omega)=|t(\omega)|e^{i\psi(\omega)},
\]
with a rapid phase variation of order \(\pi\) across resonance. Switching GST from the amorphous to the crystalline state shifts the resonance frequency by \(\Delta\omega \approx \omega_0\cdot(\Delta n/n)\), approximately \(10\%\) in practice, producing
\[
\Delta\phi(\omega)=\phi_c(\omega)-\phi_a(\omega).
\]
Rigorous-coupled wave analysis or finite-element simulation yields \(\Delta\phi(\lambda)\) that peaks near the original resonance; in practice, \(\Delta\phi\) can approach \(\pi\) over a \(\sim50\) nm bandwidth in reflection, with similar behavior in transmission [1604.01330].

The switching mechanism is laser-induced and non-volatile. The amorphous\(\to\)crystalline transition uses a \(532\) nm CW laser with spot diameter \(\approx5\ \mu\)m and intensity \(\approx3\) mW/\(\mu\)m\(^2\), holding GST between \(T_g\approx110\,^\circ\)C and \(T_m\approx630\,^\circ\)C for \(\sim\mu\)s until crystallization nucleates. Once set, each phase is stable at room temperature, yielding reflection contrast up to \(5{:}1\) (\(7\) dB) and transmission contrast up to \(1{:}3\) (\(-5\) dB). Static phase patterns can be created either by geometric tuning, for example varying \(P\), \(s\), or the resonator diameter, or by phase-state multiplexing that locally toggles GST between amorphous and crystalline states. In reflection the imposed phase is
\[
\phi(P,\mathrm{state};\lambda)=\arg[r(P,\mathrm{state};\lambda)].
\]
The reported phase-modulation depth is \(\Delta\phi\approx\pi\) per resonance shift of \(\sim150\) nm, while full \(2\pi\) coverage is described as achievable by cascading multiple resonances or by combining geometry and state switching [1604.01330].

A related but electrically addressed implementation is the hybrid plasmonic–phase-change architecture of Abdollahramezani et al. Each pixel is a one-dimensional Au/GST/SiO\(_2\)/Au stack with period \(p=550\) nm, Au nanoribbon width \(w=340\) nm, thickness \(t=30\) nm, GST stripe height \(h=180\) nm, and a \(100\) nm Au back-reflector. GST forms the dielectric gap under each Au ribbon, and its phase is switched by Joule heating. A short, high-amplitude voltage pulse of approximately \(150\) ns melts GST above \(630\,^\circ\)C and rapid quenching re-amorphizes it, whereas a longer, lower-amplitude pulse of approximately \(1\ \mu\)s heats GST above its glass-transition/crystallization temperature of approximately \(160\,^\circ\)C to nucleate and grow the crystalline phase. Thermal isolation by SiO\(_2\) ensures neighboring pixels remain below \(160\,^\circ\)C, enabling individual pixel addressing [1809.08907].

The phase modulation is governed by interference between a nearly constant non-resonant metallic reflection and a resonant Lorentzian term,
\[
r_{\mathrm{tot}}(m)=r_{\mathrm{non-res}}e^{i\theta_{\mathrm{non-res}}}+r_{\mathrm{res}}(m)e^{i\theta_{\mathrm{res}}(m)},
\]
with \(r_{\mathrm{non-res}}\simeq -1\) and \(\theta_{\mathrm{non-res}}\simeq \pi\). The GST crystallinity fraction \(L_c\in[0,1]\) is described by a Lorentz–Lorenz effective-medium model,
\[
\frac{\epsilon_{\mathrm{eff}}(m)-1}{\epsilon_{\mathrm{eff}}(m)+2}
=
L_c\frac{\epsilon_c-1}{\epsilon_c+2}
+
(1-L_c)\frac{\epsilon_a-1}{\epsilon_a+2}.
\]
At \(\lambda=1550\) nm, full-wave FEM/FIT simulations yield a reflected-phase sweep of nearly \(315^\circ\), from \(+208^\circ\) to \(-107^\circ\), with reflection amplitude above approximately \(15\%\) throughout. Eleven discrete states, \(L_c=0,10\%,20\%,\ldots,100\%\), were simulated, with approximately \(30^\circ\) phase increment per step. The device supports a \(\simeq200\) nm bandwidth, approximately \(1.5\)–\(1.7\ \mu\)m, over which the phase can be reliably mapped to \(L_c\), enabling focusing, beam steering, holography, amplitude modulation, and polarization conversion [1809.08907].

A common misconception is that static optical phase reconfiguration is equivalent to a fixed-function device. These studies show the opposite: the written state is static only between updates, while the overall platform remains rewritable and non-volatile [1604.01330][1809.08907].

## 3. Static phase shifts with mechanical or material-state reconfigurability

The movable intelligent surface framework extends static phase design by separating phase synthesis from reconfiguration actuation. The proposed MIS consists of two transmissive metasurfaces separated by a small air gap \(g\ll\lambda\): a fixed primary layer MS1 with \(M=M_r\times M_c\) elements and static phase shifts \(\phi=[e^{j\phi_1},\ldots,e^{j\phi_M}]^T\), and a smaller secondary layer MS2 with \(N=N_r\times N_c\) elements and static phase shifts \(\theta=[e^{j\theta_1},\ldots,e^{j\theta_N}]^T\), which slides discretely over MS1 along rows and columns. The number of slide positions is \(U=U_r\times U_c\), where \(U_r=M_r-N_r+1\) and \(U_c=M_c-N_c+1\). At slide position \(u\), the equivalent phase-shift vector is
\[
\bar{\theta}_u=S_u\theta+e_u\in\mathbb{C}^M,
\]
where \(S_u\in\{0,1\}^{M\times N}\) is a binary selection matrix and \(e_u\in\{0,1\}^M\) is a padding vector. Defining \(v_u=\bar{\theta}_u\odot\phi\), the received signal at user \(k\) is
\[
y_k=(v_u)^H\operatorname{diag}(h_k^H)\,G\,w_{k,u}\,s_k+n_k.
\]
The design problem jointly optimizes the static phase shifts and the slide-position selection, interpreted as beam-pattern scheduling [2511.17058].

Two optimization classes are reported. For max–min rate, a penalty-assisted BCD-SCA method relaxes the binary scheduling variables, adds a penalty \(-\rho\sum_{k,u}(\xi_{k,u}-\xi_{k,u}^2)\), and alternates over \(\xi\), \(\phi\), and \(\theta\). For sum rate, a Riemannian conjugate-gradient method operates on a product manifold formed by the complex-circle manifolds of \(\phi\) and \(\theta\) and the probability-simplex manifold of the scheduling matrix \(X=[\xi_{k,u}]\). Simulation results report that even a \(1\times1\) MS2 increases min-rate by approximately \(10\)–\(15\) bit/Hz over a static RIS, larger MS2 sizes such as \(4\times4\) add up to \(20\)–\(25\) bit/Hz, and element-wise MS2 mobility recovers approximately \(60\%\) of the gap between block-MIS and a fully dynamic RIS. At \(P=34\) dBm, the reported sum rates are approximately \(180\) bit/Hz for block-MIS, \(300\) bit/Hz for dynamic RIS, and approximately \(240\) bit/Hz for element-wise MIS. Reconfiguration is quasi-static, with switching latency on the order of seconds or minutes and control overhead of only \(\log_2U\) bits per re-pointing [2511.17058].

Phase-change metasurfaces for reconfigurable image processing provide a different static mechanism. In the Sb\(_2\)S\(_3\)-based device of Liu et al., each nanobrick with height \(h\approx100\) nm, radius \(r\approx160\) nm, and lattice constant \(a\approx500\) nm supports magnetic-dipole and electric-dipole Mie resonances in the visible, observed at \(\lambda\approx652\) nm and \(\lambda\approx689\) nm, respectively. In the amorphous state, \(n_a(\lambda)\approx2.4\)–\(2.8\) and \(k_a(\lambda)\approx0\), yielding high-\(Q\), narrow Mie resonances and a transmission profile suitable for edge detection; in the crystalline state, \(n_c(\lambda)\approx3.2\)–\(3.4\) and \(k_c(\lambda)\approx0.15\), which blueshifts and broadens the resonances, lowers the \(Q\)-factor, and produces nearly angle-independent transmission. The target transfer functions are
\[
T_a(k_x,k_y)\approx-\alpha(k_x^2+k_y^2), \qquad
T_c(k_x,k_y)\approx\beta.
\]
Near resonance and for small absorption, the angular dependence satisfies
\[
T(\theta)\propto (k_\parallel/k_0)^2=\sin^2\theta,
\]
and the simulated transmission at \(\lambda=652\) nm and \(689\) nm was fitted to \(|t|_{\mathrm{fit}}(\theta)=A\sin^2\theta\), with \(A\sim0.87\) at \(\theta=10^\circ\). The reported modulation depth is \(>10\times\), the high-\(k\) transmission is \(\sim87\%\) at \(\theta\approx10^\circ\) versus near \(0\%\) at \(\theta=0\), the numerical aperture is approximately \(0.17\), and the spatial resolution is approximately \(2.4\ \mu\)m at \(\lambda\approx650\) nm [2412.16856].

These works show two distinct meanings of static phase reconfiguration in wave-control systems. In MIS, the phase values are static but the geometry changes; in Sb\(_2\)S\(_3\) and GST metasurfaces, the geometry is fixed but the material state changes [2511.17058][2412.16856].

## 4. Phase-matched topology states in optical reconfigurable networks

In optical reconfigurable networks, static phase reconfiguration concerns collective communication phases rather than electromagnetic phase delay. ReTri is designed for a minimal two-transceiver-per-node ORN, equivalently a ring-degree-two topology with \(2n\) OCS ports. Assuming \(n=3^s\), each source block \(B[r\to d]\) is assigned a signed offset
\[
\Delta_{(r,d)}=\mathrm{ucr}_n((d-r)\bmod n)\in\{-(n-1)/2,\ldots,0,\ldots,(n-1)/2\},
\]
which admits a unique balanced-ternary expansion
\[
\Delta_{(r,d)}=\sum_{k=0}^{s-1}\tau_k(r,d)\cdot 3^k, \qquad \tau_k(r,d)\in\{-1,0,+1\}.
\]
In phase \(k\), blocks with \(\tau_k=+1\) are sent right, blocks with \(\tau_k=-1\) are sent left, and blocks with \(\tau_k=0\) stay. This completes All-to-All in
\[
T=\lceil \log_3 n\rceil
\]
synchronized phases, each served by a sparse reusable subring [2605.26930].

The topology states are induced by residue classes
\[
S_i^k=\{u\in[0,n-1]\mid u\equiv i \pmod{3^k}\},
\]
with bidirectional links \(u\leftrightarrow (u\pm 3^k\bmod n)\) inside each \(S_i^k\). Each \(S_i^k\) is a simple ring of size \(n/3^k\). The paper states that no smaller subgraph can both connect the sender/receiver pairs for phase \(k\) and keep all future peers reachable. Reconfiguration is controlled by a binary schedule \(x=(x_0,\ldots,x_{s-1})\), where \(x_k=1\) means the OCS is reconfigured to the subrings \(S_i^k\) before phase \(k\), and \(x_k=0\) means the previous topology is reused. If the last reconfiguration occurred at phase \(j<k\), then each link is stretched by \(3^{k-1-j}\) in hop length, increasing propagation delay and per-link congestion [2605.26930].

The cost model is an extended Hockney form,
\[
C^A(m)=s\alpha_s+\sum_{k=0}^{s-1}[h_k\alpha_h+m_kc_k\beta]+R\delta,
\]
where \(\alpha_s\) is per-phase startup, \(\alpha_h\) per-hop latency, \(\beta=1/b\) the per-byte transmission cost, \(m_k\) the message chunk size, \(c_k\) the maximum per-link congestion, and \(\delta\) the reconfiguration time. If ReTri reconfigures before every phase, then
\[
C^{\mathrm{ReTri}}(s-1)=s(\alpha_s+\alpha_h+\beta m/3)+(s-1)\delta.
\]
If it never reconfigures, then
\[
C^{\mathrm{ReTri}}(0)=s\alpha_s+(\alpha_h+\beta m/3)(n-1)/2.
\]
In practice the schedule is precomputed once from \(\delta\), \(n\), \(m\), \(\alpha_h\), \(\alpha_s\), and \(\beta\), and the optimal \(R^\ast\) is selected by evaluating \(C^{\mathrm{ReTri}}(R)\) for \(R=0,\ldots,s-1\) [2605.26930].

In Astra-Sim/ns-3 experiments with \(400\) Gb/s links, \(1\ \mu\)s propagation per hop, \(1.7\ \mu\)s per-phase startup, and \(\delta\) swept from \(1\ \mu\)s to \(50\) ms, ReTri achieved up to \(10\times\) speed-up versus static All-to-All for small \(\delta\), with benefits persisting up to \(\delta\approx1\) ms for messages up to \(8\) MB and even \(\delta\approx50\) ms for \(256\) MB. It also improved reconfigurable Bruck by up to \(2.1\times\), with typical gains of \(1.6\)–\(2\times\) for small messages and \(1.2\)–\(1.5\times\) for larger messages. The central design principle is that topology optimization and communication-phase structure are co-designed rather than treated independently [2605.26930].

A common misconception is that reconfigurable optical fabrics necessarily require per-phase topological reinstrumentation. ReTri is explicitly built around the opposite trade-off: sparse reconfiguration is used to amortize \(\delta\) across multiple phases, at the price of longer paths [2605.26930].

## 5. Voltage phasors and user-phase assignment in distribution systems

One branch of the literature uses static phase reconfiguration to regulate voltage phasors before a switching action. In unbalanced distribution feeders, the linearized model developed for switch synchronization combines voltage magnitude and angle relations. For line \((m,n)\),
\[
E_m \approx E_n + 2M_{mn}P_{mn} - 2N_{mn}Q_{mn},
\]
and
\[
\Theta_m \approx \Theta_n - N_{mn}P_{mn} - M_{mn}Q_{mn},
\]
where \([E_n]_\phi=|V_n^\phi|^2\) and \([\Theta_n]_\phi=\angle V_n^\phi\). Together they form the “full-phasor” linearization
\[
\begin{bmatrix}
\Delta E_{mn}\\
\Delta \Theta_{mn}
\end{bmatrix}
\approx
\begin{bmatrix}
2M_{mn} & -2N_{mn}\\
-N_{mn} & -M_{mn}
\end{bmatrix}
\begin{bmatrix}
P_{mn}\\
Q_{mn}
\end{bmatrix}.
\]
An OPF then minimizes squared magnitude and angle differences across a target switch while keeping all voltages within \(0.95\)–\(1.05\) p.u. and respecting DER capacities. On modified IEEE 13-node feeders, the full phasor control case reduced the per-phase average maximum \(\Delta|V|\) from \(0.017\) p.u. in the no-control case to \(2\times10^{-4}\) p.u., and the maximum \(\Delta\theta\) from \(1.6^\circ\) to \(0.01^\circ\); the resulting switch flow decreased from approximately \(1.6+j0.6\) p.u. to approximately \(5\times10^{-3}+j0.01\) p.u. On the modified IEEE 37-node sequential switching case, \(\Delta\theta\) decreased from approximately \(0.09^\circ\) to \(0.001^\circ\) for the first switch and from approximately \(0.12^\circ\) to \(0.0009^\circ\) for the second. Reported QP solution times were \(O(0.1\)–\(0.3\) s) on a standard PC [1804.02080].

A distinct planning-oriented use of the same phrase concerns the static re-phasing of low-voltage users. Here binary variables \(\delta_{i,\phi}\in\{0,1\}\) assign single-phase user \(i\) to phase \(\phi\in\{1,2,3\}\), subject to
\[
p_{i,t,\phi}=\hat p_{i,t}\delta_{i,\phi}, \qquad
q_{i,t,\phi}=\hat q_{i,t}\delta_{i,\phi}, \qquad
\sum_{\phi\in\Phi}\delta_{i,\phi}=1.
\]
The formulation can also limit the total number of switching actions through
\[
\sum_{i\in U_{pr}}\sum_\phi |\delta_{i,\phi}-\delta_{i,\phi}^0|\le \Delta\delta^{\max}.
\]
Three optimization approaches are compared: an exact MINLP, an MIQP based on LinDist3Flow, and a GA. The exact MINLP supports actual imbalance metrics such as
\[
\mathrm{PVUR}_{i,t}=
\max_\phi \left|1-\frac{|u_{i,t,\phi}|}{\frac13\sum_\phi |u_{i,t,\phi}|}\right|\times100\%,
\]
while the MIQP uses proxy objectives such as \(\mathrm{PVUR}_{i,t}^\ast\) and \(P_U^\ast\). In a \(55\)-user, \(96\)-time-step case, MIQP reduced PVUR from \(0.96\%\) to \(0.70\%\) and \(P_U\) from \(24.4\%\) to \(14.6\%\), compared with \(0.72\%\) and \(17.9\%\) for the GA average. The MIQP solution times were approximately \(50\) min for the PVUR\(^\ast\) objective and approximately \(90\) min for the \(P_U^\ast\) objective on \(10\) threads, while the GA took approximately \(110\) min per run and the MINLP did not reach optimality within \(24\) h for the \(55\)-node case. The study also reports that even \(10\%\) re-phasing, corresponding to \(\Delta\delta^{\max}=5\), achieves approximately \(50\%\) of the maximum imbalance reduction [2507.05910].

These two lines of work address different operational layers. The OPF-based method aligns full phasors across a switch immediately before a reconfiguration action, whereas the LV planning formulations choose a single phase-connection assignment that performs well over months to seasons [1804.02080][2507.05910].

## 6. Reconfigurable power-electronic topologies and capability expansion

In reconfigurable power electronics, static phase reconfiguration is realized by changing circuit interconnections rather than continuously varying modulation parameters. One example is the automatic transformation between a three-phase 3-level cascaded H-bridge and a three-phase 2-level converter. Two topologies are presented. In Topology 1, ideal high-resistance switches reroute the midpoints; in Topology 2, a single full H-bridge replaces the separate PWM generators and the design uses two fewer ideal switches overall. A safe break-before-make sequence is specified: inhibit all PWM at \(t=t_0\), wait a deadtime margin, change the ideal-switch gates, wait for switch transition, then re-enable PWM on the newly selected bridge. The typical timing values given are \(t_d\approx5\)–\(10\ \mu\)s and \(t_s\approx1\ \mu\)s, with a representative total reconfiguration time of approximately \(11\ \mu\)s. In 3-level mode, the phase-to-neutral voltage is
\[
v_{an}(t)=v_{a,\mathrm{upper}}(t)+v_{a,\mathrm{lower}}(t),
\]
with \(v_{an}\in\{+96,0,-96\}\) V for \(48\) V sources; in 2-level mode,
\[
v_{aN}(t)=M_a(t)\cdot 96\,\mathrm{V}, \qquad M_a(t)\in\{+1,-1\}.
\]
The reported trade-offs are lower THD in 3-level mode, higher THD or higher switching frequency requirements in 2-level mode, and slightly higher reliability with Topology 2 because it uses fewer ideal switches [1710.10242].

A second line of work concerns a low-cost reconfiguration stage at the output of balanced three-phase, multi-terminal ac/dc/ac converters for unbalanced distribution-system applications. The proposed four-wire VSC replaces fixed hard-wiring with \(m\) half-bridge legs and a \(4\times m\) one-leg-to-four-wire selector matrix \(B\in\{0,1\}^{4\times m}\), where each column has exactly one \(1\). If \(I_{\mathrm{base}}\) is the sum of all leg ratings and the leg capacities are \(a_k\) with \(\sum_{k=1}^m a_k=1\), then the maximum current on wire \(i\in\{a,b,c,n\}\) is
\[
I_{\max,i}=I_{\mathrm{base}}\sum_{k=1}^m B_{ik}a_k.
\]
This allows leg capacity to be reassigned from one wire to another on a slow timescale, for example to support a heavily loaded phase or a large neutral current [2402.03978].

Capability is described through a feasible injection set \(C\) subject to per-phase current constraints, neutral-current limits, and either standalone or interconnected dc-side power balance. In the conventional equal-leg four-wire design, the standalone active-power projection yields a regular hexagon with area
\[
A_{\mathrm{conv}}=\frac{3\sqrt3}{2}\left(|V_o|I_{\mathrm{base}}/4\right)^2.
\]
For an idealized fully reconfigurable converter,
\[
A_{\mathrm{ideal}}=\frac{3\sqrt3}{2}\left(|V_o|I_{\mathrm{base}}\right)^2.
\]
For the proposed discrete reconfigurable converter, ignoring neutral clipping,
\[
A_{\mathrm{reconf}}=\frac{\sqrt3}{2}|V_o|^2I_{\mathrm{base}}^2\left(a_aa_b+a_ba_c+a_ca_a\right).
\]
The paper reports that a conventional converter may need up to \(75.3\%\) greater capacity to match an idealized reconfigurable converter. For the optimally sized four-leg design \(S_{\mathrm{Opt}}\) with \(a=(0.12,0.22,0.26,0.40)\), the required capacity increase is reported as approximately \(57.8\%\). Uniform \(m\)-leg designs improve with \(m\), with reported standalone factors \(n_A\approx1.50\) for \(m=5\), \(1.40\) for \(m=8\), and \(1.30\) for \(m=15\), although the study notes diminishing marginal returns beyond \(m\approx9\)–\(12\) [2402.03978].

Across converter studies, the principal trade-off is explicit: static reconfiguration increases feasible operating sets and converter utilization, but it adds selector-switch complexity, additional point-of-failure risk, and design constraints associated with neutral current and break-before-make operation [1710.10242][2402.03978].

Source: https://www.emergentmind.com/topics/static-phase-reconfiguration