---
title: Rotated Surface Code
url: https://www.emergentmind.com/topics/rotated-surface-code
type: topic
---

# Rotated Surface Code

The rotated surface code is a planar CSS surface code obtained either as a conceptual \(45^\circ\) reorganization of the standard planar surface code or, from a coding-theoretic perspective, as a punctured version of it. In the square case it has parameters \([[d^2,1,d]]\); in the rectangular case it has parameters \([[d_X d_Z,1,d_X/d_Z]]\). Its bulk stabilizers are local weight-4 \(X\)-type and \(Z\)-type operators, its boundary stabilizers are reduced-weight operators, and its logical operators are strings connecting like boundaries. This combination of planar locality and reduced qubit footprint is the reason it has become a standard reference point for both architectural and algorithmic work on fault-tolerant quantum computation [2409.14765] [2312.17057].

## 1. Geometric definition and code parameters

For the square family, the defining parameter relation is
\[
[[d^2,1,d]],
\]
so a distance-\(d\) rotated patch encodes one logical qubit into \(d^2\) data qubits. In the rectangular case, the corresponding family is
\[
[[d_X d_Z,1,d_X/d_Z]],
\]
with asymmetric \(X\)- and \(Z\)-distances \(d_X\) and \(d_Z\) [2312.17057].

The geometry can be described in two equivalent ways that both appear in the literature. One description starts from the standard planar surface code and removes corner qubits, leaving a diamond-shaped patch that is then redrawn as a \(45^\circ\)-rotated lattice. Another description treats the rotated code as the planar code after a conceptual \(45^\circ\)-style reorganization that realizes the same nominal distance with a denser patch [2002.00362] [2409.14765].

A useful operational distinction from the unrotated planar code is the total qubit count at fixed distance when ancillas are included. The rotated code uses \(d^2\) data qubits and \(d^2-1\) auxiliaries, for a total of
\[
2d^2-1,
\]
whereas the unrotated code uses \(2d^2-2d+1\) data qubits and \(2d^2-2d\) auxiliaries, for a total of
\[
4d^2-4d+1.
\]
For the \(d=3\) rotated code this gives \(9\) data qubits and \(8\) ancilla qubits, i.e. \(17\) physical qubits [2409.14765] [1901.10847].

The stabilizer structure is the standard CSS one. In the square case, generators have weight \(2\) or \(4\) rather than \(3\) or \(4\), with weight-4 bulk checks and weight-2 boundary checks. Logical \(Z_L\) is a chain of \(Z\)s connecting rough boundaries, and logical \(X_L\) is a chain of \(X\)s connecting smooth boundaries on the dual lattice. Some works state the same content in boundary-language, others simply describe logical \(X\) and \(Z\) as products of Pauli operators along connected paths joining opposite boundaries [2312.17057] [2505.18592].

## 2. Syndrome extraction, locality, and circuit-level geometry

The rotated surface code is designed for local syndrome extraction. Data qubits are coupled to local ancillas that measure alternating \(X\)- and \(Z\)-type checks, and a common implementation pattern uses a 4-layer CNOT schedule for one syndrome-extraction round. In compact rotated layouts, the \(X\)-ancillas and \(Z\)-ancillas occupy different diagonal lines, a feature exploited directly in neutral-atom addressing schemes [2412.01391].

At circuit level, the CNOT order matters. A valid ordering must preserve mutual commutation of stabilizer measurements, allow parallel execution to avoid unnecessary idle errors, and, in the rotated code, avoid hook errors. Hook errors are propagated single faults that become weight-2 correlated data errors aligned with a logical direction; if the ordering is chosen badly, they can effectively halve the number of faults needed to form a logical operator. This dependence on schedule is a central difference between abstract code distance and circuit distance [2409.14765].

Recent work has therefore focused on schedule design as a first-class component of rotated-surface-code fault tolerance. One proposal is the diagonal schedule, which orders ancilla-data interactions so that hook errors lie along plaquette diagonals instead of horizontal or vertical directions. On hardware supporting parallel measurement, reset, and gate operations, this gives a period of \(6\) time steps instead of \(7\) for the traditional mixed \(N\)- and \(Z\)-shaped approach, while preserving full circuit-level distance in memories and several surgery-like geometries [2602.09099].

Interface geometry produces an analogous issue. For rotated patches, a naive straight boundary between modules can split a weight-4 stabilizer \(2\)–\(2\) across the interface, creating dangerous boundary-parallel hook errors. A zigzag interface removes this pathology and allows direct noisy links, gate teleportation, and CAT-state gadgets to preserve full code distance for both \(X\) and \(Z\), even when interface CNOTs are much noisier than bulk gates [2503.04968].

## 3. Decoding and logical-error inference

Because the code is CSS, many decoding strategies treat \(X\) and \(Z\) components independently. In the simplest picture, the syndrome is the collection of parity-check values from a surface-code cycle, or, under repeated extraction, the set of detection events formed by changes relative to the previous cycle [1901.10847].

The standard circuit-level baseline in recent comparisons is minimum-weight perfect matching. In a detailed rotated-versus-unrotated comparison, memory experiments were simulated with Stim, decoded with PyMatching 2, and analyzed under circuit-level depolarizing and superconducting-inspired noise. That work showed that fair comparison requires matching at equal logical error rate rather than equal distance, because the unrotated code can have lower \(p_L\) at fixed \(d\) even though the rotated code uses fewer qubits [2409.14765].

A large decoder literature now specializes to the rotated code. One line uses neural-network methods. A distributed neural decoder decomposes a larger rotated lattice into overlapping \(d=3\) rotated tiles, computes local logical-class probabilities \(\mathrm{Prob}(I),\mathrm{Prob}(X),\mathrm{Prob}(Z),\mathrm{Prob}(Y)\) on each tile, and then feeds those summaries into a global network. For \(d=5,7,9\), this gave decoding performance similar to Blossom and to an earlier full-lattice neural decoder while avoiding direct learning over exponentially large syndrome spaces [1901.10847].

Another line targets hardware-friendly low-complexity decoding. Progressive-Proximity Bit-Flipping (PPBF) adapts bit-flipping to the rotated planar code by using a proximity heuristic, a degeneracy-aware matching post-processing stage, and virtual boundary checks for open boundaries. Under a binary symmetric channel with perfect syndrome measurements, it reports a threshold of \(7\%\) for the rotated planar code [2402.15924].

At the opposite end of the design space are hybrid or hierarchical decoders. In a confidence-gated decoder for the rotated surface code under circuit-level depolarising noise, a feed-forward neural network handles most syndromes while low-confidence cases are escalated to MWPM. At \(d=7\), routing only \(3.30\%\) of syndromes to the refinement stage at confidence threshold \(0.90\) gives end-to-end accuracy \(0.99694\), while routing \(6.19\%\) at threshold \(0.95\) gives \(0.99812\); the abstract summarizes the overall gain as an improvement from \(99.21\%\) to \(99.81\%\) while routing only \(3.3\%-6.2\%\) of syndromes to MWPM [2607.05814].

The rotated code also appears as a soft-information front end for concatenated architectures. In a hierarchical construction with a distance-5 rotated inner code, the \(L=5\) patch is decoded exactly by lookup table, and the syndrome-conditioned logical error probability
\[
P_L(p\mid s)
\]
is passed upward as a prior for BP-OS decoding on a hypergraph-product outer code. That use of exact block-level soft information is specific to the small rotated patch and is one reason the inner code is fixed to \(L=5\) in that design [2505.18592].

## 4. Resource tradeoffs and comparative performance

At fixed distance, the rotated code asymptotically uses about half as many qubits as the unrotated planar code, but equal distance is not the right engineering comparison. Under circuit-level noise and worst-case unrotated ordering, thresholds are essentially equal by inspection,
\[
p_{\mathrm{th,SD}}\approx 5.65\times 10^{-3},\qquad
p_{\mathrm{th,SI}}\approx 5.05\times 10^{-3},
\]
yet the rotated code still wins at equal logical error rate because of its smaller qubit footprint [2409.14765].

The headline equal-\(p_L\) comparison is concrete. At \(p=10^{-3}\) and target \(p_L=10^{-12}\), the rotated code uses \(1395\pm 18\) qubits under standard depolarizing noise versus \(1847\pm 25\) for the unrotated code, a ratio of \(73.6\pm 1.3\%\). Under superconducting-inspired noise the corresponding numbers are \(1396\pm 18\) and \(1846\pm 25\), a ratio of \(75.6\pm 1.4\%\). Rounded to realizable distances, the comparison is \(d=27\), \(1457\) qubits for rotated versus \(d=23\), \(2025\) qubits for unrotated, i.e. \(72\%\) [2409.14765].

Low-\(p\) analytical work reaches a compatible conclusion from a different angle. For the rotated \([[9,1,3]]\) and standard \([[13,1,3]]\) surface codes under depolarizing noise, the rotated code has worse \(\beta_2\) but a smaller block length. The asymptotic comparison ratio is
\[
r=1.18>1,
\]
so the rotated \([[9,1,3]]\) is asymptotically better than the original \([[13,1,3]]\) on that channel [2312.17057].

Under highly biased noise the rotated code acquires a stronger distinction. For odd rotated \(j\times k\) codes under pure \(Y\) noise, there is exactly one nontrivial \(Y\)-type logical operator,
\[
Y^{\otimes n},
\]
so
\[
d_Y=jk=n,\qquad c_Y=1.
\]
The same work proves a \(50\%\) threshold for pure \(Y\) noise, equivalent to the tailored-code pure-dephasing setting, and shows that the same logical failure rate achievable with a square surface code using \(n\) physical qubits can be obtained with a co-prime or rotated surface code using only \(O(\sqrt{n})\) physical qubits [1812.08186].

The main caveat in biased-noise optimization concerns the XZZX modification on rectangular lattices. For square lattices, rotation plus XZZX can be highly effective; for rectangular rotated codes, however, adding XZZX can collapse
\[
[[d_X d_Z,1,d_X/d_Z]]
\]
to
\[
[[d_X d_Z,1,\min\{d_X,d_Z\}]],
\]
as illustrated by the rotated \(3\times 5\) code going from \([[15,1,3/5]]\) to \([[15,1,3]]\). On rectangular lattices designed to exploit asymmetry, the simultaneous use of rotation and XZZX can therefore be suboptimal [2312.17057].

## 5. Encoding, logical gates, and experimental realizations

The rotated surface code has become a target for explicit low-depth encoders. An early local-unitary construction gives a rotated-code encoder with depth \(2L+O(1)\), built from a 4-step inductive rule that increases distance by \(2\) [2002.00362]. A later construction improves this substantially: it gives nearest-neighbor square-grid encoding circuits of depth
\[
d+[d\bmod 2],
\]
using a depth-4 base encoder for \(d=3\), a depth-2 base encoder for \(d=2\), and a depth-2 growth circuit for each \(d\to d+2\) step. Within the inductive-growth framework, the paper proves that depth \(d+O(1)\) is optimal [2509.09779].

Nonlocal unitary encoding has also been formulated directly in terms of rotated patches. A code-conversion chain
\[
Rot\,d \longrightarrow Reg\,d \longrightarrow Rot\,(2d-1)
\]
produces a depth-4 distance-doubling step and hence total depth
\[
4\log_2 d + O(1)
\]
for \(d=2^k+1\), while preserving compatibility with standard MWPM decoding after one perfect syndrome round [2506.04084].

Logical Clifford gates have been worked out particularly explicitly on neutral-atom hardware. For the logical Hadamard, one applies transversal \(H\) to all data qubits and then rotates the patch by \(\pi/2\), implemented as two reflections using horizontal and diagonal 2D-AODs. For the logical \(S\) gate, the key observation is that after two CNOT layers of rotated-code syndrome extraction, the joint data-plus-ancilla state becomes an unrotated surface-code state at half-cycle; a fold-transversal \(S\) is inserted at that point, and the remaining two CNOT layers return the system to the rotated-code representation. Together with transversal logical CNOT, this yields a logical Clifford generating set \(\{\overline H,\overline S,\overline{\mathrm{CNOT}}\}\) on rotated patches [2412.01391].

These constructions have begun to appear experimentally. On a 107-qubit superconducting processor, key elements of patch-based logical processing were demonstrated on distance-3 rotated XZZX surface-code patches with repeated syndrome extraction, neural-network decoding, and no post-selection. The primitive layer comprised merge and split, patch expansion and shrinkage, and deformations mediated by domain walls and twist defects; these were then composed into logical state routing, CNOT, Hadamard, and phase gates [2607.01473].

## 6. Rotated surface codes in hybrid architectures and current limitations

A striking recent role for the rotated surface code is as a hardware-local inner code inside higher-rate architectures. In a two-level concatenated construction with a random hypergraph-product outer code and a distance-5 rotated inner code, each outer-code qubit is replaced by one \([[25,1,5]]\) rotated block. For upper-layer parameters \([[25s^2,s^2,d_s]]\), the full concatenated code has parameters
\[
[[625s^2,s^2,5d_s]].
\]
The main practical regime identified is
\[
s\ge 4,\qquad d\ge 25,\qquad p\lesssim 10^{-2},
\]
where the hierarchical code is reported to outperform a standalone rotated surface code in both qubit efficiency and logical error rate [2505.18592].

A related but distinct architecture is the Hierarchical Logical Processor, which again keeps the rotated surface code as the level-0 substrate. Ordinary square rotated patches act as cores, while elongated rotated patches of width \(d_0\) and length \(d_0d_1\) act as shuttle buses. These buses support hybrid-unit CNOTs between one bus and up to \(d_1\) cores, so long-range connectivity is needed only once every \(\Theta(d_0)\) rounds of level-0 error correction. At physical error rate \(10^{-3}\), an HLP based on the \([[256,194,4]]\) code achieves \(3\)–\(4\) times higher qubit efficiency than the standard RSC, and compared with the yoked surface code on the same level-1 code it reduces space overhead per logical qubit by \(100\)–\(200\) physical qubits and shortens the logical error-correction cycle time by a factor of \(20\)–\(30\) [2606.22594].

Magic-state preparation has likewise been costed directly on rotated patches. A recursive implementation of 15-to-1 distillation on the rotated surface code gives \(|T\rangle\) preparation on a \(d\)-by-\(3d\) grid of data qubits for up to \(15d\) error-correction cycles, and \(|CCZ\rangle\) preparation on a \(3d\)-by-\(2d\) grid for up to \(10.5d\) cycles. The same analysis, however, shows that matching the output magic-state error to the logical error rate of the surrounding rotated-code computation at large distance requires a significantly lower physical error threshold than that of the underlying surface code itself [2603.05409].

The modern literature also makes the limits of current evidence explicit. Some decoder and hierarchy studies still use perfect syndrome extraction or noiseless syndrome measurements, notably the distributed neural decoder, PPBF, and the hierarchical HGP–rotated construction [1901.10847] [2402.15924] [2505.18592]. Conversely, circuit-level studies reveal schedule sensitivity, interface-specific hook effects, and basis-dependent anisotropies that do not appear in code-capacity models. This suggests that the rotated surface code should be understood not merely as a static \([[d^2,1,d]]\) family, but as a patch-based computational substrate whose practical behavior is determined jointly by geometry, extraction schedule, decoder, and the surrounding architecture [2409.14765] [2602.09099].

Source: https://www.emergentmind.com/topics/rotated-surface-code