---
title: Partial-Load Optimised Multi-Level Inverter (MLI)
url: https://www.emergentmind.com/topics/partial-load-optimised-multi-level-inverter-mli
type: topic
---

# Partial-Load Optimised Multi-Level Inverter (MLI)

Searching arXiv for the cited papers to ground the article and verify identifiers.
arxiv_search({"query":"id:2104.09643 OR id:2104.05759 OR id:2104.09642 OR id:1404.2259 OR id:2011.12164 OR id:2508.14224 OR id:2507.03573","max_results":10,"sort_by":"submittedDate"})
A partial-load optimised multi-level inverter (MLI) is an MLI architecture and control strategy designed to preserve output-voltage quality, efficiency, or grid compliance when the commanded operating point is far below the converter’s installed voltage or power capability. In cascaded H-bridge (CHB) selective harmonic elimination (SHE) systems, partial load corresponds to a low modulation index or a low per-unit output voltage, where feasible switching-angle solutions shrink or disappear and total harmonic distortion (THD) rises sharply. In distributed solar arrays, partial-load optimisation is achieved by resynthesising per-module DC references and H-bridge schedules as the number of operating modules changes. In battery-electric-vehicle traction systems, the same term denotes inverter topologies and modulation schemes tailored to the operating points that dominate real drive cycles rather than peak power [2104.09643] [1404.2259] [2508.14224].

## 1. Concept and operating regime

The term “partial load” is application-dependent but technically consistent across the literature. In CHB MLIs using SHE-PWM, partial-load operation refers to conditions where the commanded fundamental output voltage $V_1$ is a small fraction of the available DC-link voltage, so that the modulation index $M$ is low and tends toward zero. In the variable-DC-link CHB formulation, the per-unit output is written as

$$
V_{o,\text{pu}}=\frac{V_1}{V_{DC}},
$$

with $V_{DC}=\sum_i V_{dc,i}$, and low $V_{o,\text{pu}}$ is precisely the regime in which fixed-link SHE becomes ill-conditioned [2104.09643].

In distributed solar-array MLIs, partial load is not primarily a low-$M$ problem but a reduction in the number of operational modules. The cascaded AC voltage is the series sum

$$
V_{ac}(t)=\sum_{i\in \mathcal O(t)} V_i^{HB}(t),
$$

where $\mathcal O(t)$ is the set of operating modules. The number of available levels changes from $L=2N+1$ under nominal operation to $L=2N_{op}+1$ under partial load, with $N_{op}=|\mathcal O(t)|$ [1404.2259].

In traction inverters for battery electric vehicles, partial load denotes the broad region of the torque–speed envelope where the machine and inverter operate well below peak capability. The cited dataset of more than 1000 European-market BEVs shows installed peak motor power rising toward a fleet average near 250 kW, while the WLTP cycle rarely demands more than about 50 kW. Under this interpretation, partial-load optimisation is motivated less by voltage-range extension than by cycle-average efficiency, chip-area allocation, modulation-induced motor losses, and total system cost [2508.14224] [2507.03573].

A unifying feature is that partial-load optimisation does not merely lower the commanded amplitude. It reassigns internal degrees of freedom—DC-link magnitudes, switching schedules, active levels, neutral-point paths, or operating modes—so that the converter behaves favorably in the region where it actually spends most of its operating time.

## 2. Low-modulation pathology in staircase and SHE-based MLIs

The canonical partial-load pathology appears in staircase SHE. For a quarter-wave symmetric CHB waveform with equal DC links, the $n$th harmonic is

$$
V_n=\frac{4V_{dc}}{n\pi}\sum_{i=1}^{k}\cos(n\alpha_i),
$$

and with variable DC links it becomes

$$
V_n=\frac{4}{n\pi}\sum_{i=1}^{k} V_{dc,i}\cos(n\alpha_i).
$$

At low modulation index, the fundamental constraint requires the cosine sum to be small while several low-order harmonic sums must simultaneously be zero. The 2021 CHB studies describe this regime as one in which feasible solutions to the transcendental SHE equations shrink or disappear, producing either non-convergence of solvers or large residual low-order harmonics and very high THD [2104.09643] [2104.05759].

This issue is visible across different level counts and parametrisations. In a 7-level single-phase CHB with $N=3$ H-bridge cells and three switching angles per quarter cycle, the targeted equations set the fundamental and eliminate the 3rd and 5th harmonics under the ordering constraint $0<\alpha_1<\alpha_2<\alpha_3<\pi/2$. In a single-phase 5-level CHB with two H-bridge cells and two switching angles per quarter cycle, one equation is used to set the fundamental and one to eliminate the 3rd harmonic. In the variable-DC-link 5-level formulation, six switching angles per quarter are used to meet the fundamental and eliminate the 3rd, 5th, 7th, 9th, and 11th harmonics. These are distinct SHE formulations, but all three papers report the same low-$M$ failure mode: as the demanded output becomes small, angle sets approach their bounds, the waveform degenerates, and harmonic elimination degrades [2104.09642] [2104.09643] [2104.05759].

The associated optimisation problem is typically posed either as harmonic nulling with a fundamental-tracking constraint or as direct THD minimisation. One representative objective is

$$
J(\boldsymbol{\alpha}) = w_1\,\left|V_1(\boldsymbol{\alpha}) - V_{1,\text{target}}\right|
+ \sum_{h\in\mathcal H} w_h\,|V_h(\boldsymbol{\alpha})|,
$$

with $\mathcal H=\{3,5,7,9,11\}$ in the 5-level variable-link case. The 2021 papers use particle swarm optimisation (PSO) because it is described as robust in the unknown search space, whereas Newton–Raphson or genetic-algorithm approaches may require delicate initial guesses. The reported practice is to compute angle tables offline and store them in lookup tables rather than perform real-time optimisation [2104.09643].

A common misconception is that increasing the number of output levels alone resolves partial-load distortion. The cited CHB results do not support that view. With fixed DC links, THD still rises sharply at low per-unit output even in 5-level and 7-level cases, because the limiting factor is not only staircase resolution but the solvability of the constrained harmonic-elimination equations [2104.09643] [2104.05759] [2104.09642].

## 3. Variable DC-link strategies for partial-load optimisation

The principal SHE-based remedy is to reduce the DC-link voltage when a low fundamental is required, thereby increasing the effective modulation index seen by the angle solver while still delivering the desired external output. In the 5-level CHB fed by high-frequency isolated DC-DC converters, each H-bridge cell has its own isolated full-bridge converter with a high-frequency transformer, duty ratio $D$ as the control variable, and regulation that enforces $V_{dc,1}=V_{dc,2}$. The relationship is summarized as

$$
M_{\text{new}}=D\,M_{\text{old}},
$$

so that a commanded low external $V_1$ can be produced using a high-quality angle set from a region near $M\approx 1$ while the converters scale $V_{DC}$ in real time [2104.09643].

In the 7-level CHB formulation, the same idea is expressed directly through the required per-cell voltage:

$$
V_{dc,\text{new}}=\frac{\pi V_1^*}{4\sum_{i=1}^{s}\cos(\alpha_i)}.
$$

The paper uses a “half-voltage mode” below approximately $0.5$ p.u., so that when $V_{dc,\text{new}}=\tfrac{1}{2}V_{dc,\text{nom}}$, the effective modulation index doubles:

$$
m_{\text{new}}=2m_{\text{old}}.
$$

This moves the operating point to a friendlier region of the SHE solution space while preserving the requested $V_1^*$ [2104.05759].

A third implementation uses an adjustable DC-link generated by a 12-pulse thyristor rectifier. There, each DC-link output is

$$
E=\frac{3}{\pi}V_s\cos(\alpha),
$$

and the controller chooses $E$ so that

$$
M_{\text{new}}=\frac{(V_o)_1}{2E}=1.
$$

Combining this with the conventional per-unit definition yields $E=V_{o,\text{pu}}V_{dc}$, and the required firing angle is

$$
\alpha=\cos^{-1}\!\left(\frac{\pi V_{o,\text{pu}}V_{dc}}{3V_s}\right).
$$

The stated effect is to re-expand the feasible region for the two-angle 5-level SHE problem and hold THD at a constant reported value across a wide low-output range [2104.09642].

| Strategy | Control law | Reported purpose |
|---|---|---|
| Isolated HF DC-DC per cell | $M_{\text{new}}=D\,M_{\text{old}}$ | Keep internal SHE modulation high |
| Half-voltage mode in 7-level CHB | $m_{\text{new}}=2m_{\text{old}}$ | Improve low-$m$ solvability |
| 12-pulse rectifier DC-link control | $M_{\text{new}}=1$ via $E=\frac{3}{\pi}V_s\cos(\alpha)$ | Restore feasible 5-level SHE angles |

These strategies differ in hardware, but they all act on the same bottleneck: the shrinking feasible set of staircase angles at low output. This suggests that “partial-load optimisation” in SHE-driven MLIs is fundamentally a feasible-region management problem rather than only a harmonic-filtering problem.

## 4. Distributed and reconfigurable partial-load MLIs

A different branch of the literature treats partial-load optimisation as online reconfiguration under changing module availability. In the distributed solar-array inverter, each module contains a solar panel with MPPT, a buck-boost converter that regulates the local DC bus $V_i$ to a commanded reference $V_i^{ref}$, an H-bridge that outputs $+V_i$, $0$, or $-V_i$, and a microcontroller with local control and communications. A distributed identifier algorithm detects failures, assigns contiguous indices to surviving modules, and immediately updates both the DC references and the H-bridge switching times [1404.2259].

The core control law is simple:

$$
V_i^{ref}(t)=\frac{V_{\text{grid,peak}}}{N_{op}(t)},
$$

so that the AC amplitude is preserved as the number of operating modules changes. The first H-bridge transition delay for module $i$ is

$$
t_i^{z+}=\frac{T_{ac}}{2\pi}\sin^{-1}\!\left(\frac{id_i}{N_{op}+1}\right),
$$

with subsequent segment times completing the sequence $\text{Zero}^+\rightarrow \text{Positive}\rightarrow \text{Zero}^-\rightarrow \text{Negative}$ over one grid period. The distributed identifier is defined by $id_i=i-F_i^L(t)$, where $F_i^L(t)$ counts failed modules to the left [1404.2259].

This architecture reframes partial-load optimisation. The key issue is not low modulation index in a fixed CHB string, but a time-varying effective converter size. THD depends primarily on $N_{op}$: simulations show that a healthy array with $N_{op}=10$ and an array with nominal $N=15$ but 5 failures both produce THD of approximately $5\%$, and arrays with $N_{op}\ge 16$ achieve THD of approximately $2.5\%$. After a dynamic failure, the identifier, gossip, and rescheduling return the averaged THD to the new $N-1$ baseline within at most half a grid period for the large-array case and approximately one period for the $N=5$ case [1404.2259].

The same paper is explicit about the boundaries of this reconfigurable notion of optimisation. Operation is sustained only so long as $N_{op}\ge N_{\min}$, where

$$
N_{\min}\ge \frac{V_{\text{grid,peak}}}{V_{m,\max}},
$$

and open-circuit failures are out of scope. Thus, partial-load optimisation here is inseparable from redundancy, distributed communication, and fault handling.

## 5. Topology-level partial-load optimisation in automotive and traction systems

In traction applications, partial-load optimisation is often realised at the topology and modulation level rather than by variable SHE DC links. One example is the DC-autotransformer-based MLI for automotive use. It combines a modular DC-DC stage implemented as a multi-active-bridge DC-autotransformer, a voltage tap selector, and a two-switch PWM module. With $M$ series H-bridge modules, the number of discrete DC levels is

$$
L=M+1,
$$

and in the prototype with $M=4$ and a 400 V DC bus, taps at 0, 100, 200, 300, and 400 V are provided. The tap selector chooses two neighboring taps and the PWM stage time-averages between them:

$$
d(t)=\frac{v_{\text{ref}}(t)-V_k}{V_{k+1}-V_k}, \qquad
v_o(t)\approx d(t)V_{k+1}+(1-d(t))V_k.
$$

The reported partial-load advantage is architectural: during any output state, the load current traverses only one tap-selector device and one PWM device, independent of $M$, while the magnetically coupled DC-autotransformer self-balances module voltages without large capacitors [2011.12164].

Recent BEV work extends the idea to three-level traction inverters explicitly tailored to the operating points that dominate real drive cycles. The assessed topologies are a conventional 2L-B6 inverter and two partial-load-focused three-level topologies, 3L-TNPC and 3L-ANPC, all under an 800 V split bus and 10 kHz space-vector PWM. In this setting, partial-load improvement arises from three-level phase states $v_{an}\in\{-V_{dc}/2,0,+V_{dc}/2\}$, reduced device voltage swings to approximately $V_{dc}/2$ for many transitions, clamped zero states, and lower modulation-induced motor losses [2508.14224].

The reported quantitative result is that the 3L-TNPC inverter, with only approximately 30% additional SiC chip area, lowers drive-cycle drivetrain losses by 0.67 kWh/100 km relative to a SiC 2L-B6 baseline. The 3L-ANPC achieves slightly larger energy savings but requires approximately 69% chip area in the cited study. Battery-pack cost deltas derived from the reported energy savings are negative for both three-level options, but the paper notes that additional semiconductor costs are not included in those battery-related savings [2508.14224].

A complementary optimisation-based comparison evaluates a three-level TNPC against a dual open-end winding traction inverter. The TNPC can operate in true 3L mode in partial-load regions and fall back to 2L at high torque or speed, while the open-end system switches between H-mode and a lower-voltage Y-mode to reduce harmonic motor losses. The main conclusion is that TNPC shows the superior $\Delta e$–area trade-off for the studied motor and modulation set, and that an additional 25–30% chip area over the B6 baseline is a strong compromise, with benefits flattening beyond approximately +50% [2507.03573].

These traction papers broaden the meaning of partial-load optimisation. In them, the central metric is not low-frequency THD alone, but the aggregate

$$
P_{\text{tot}}=P_{\text{inv}}+P_{\text{mot,h}}+P_{\text{mot,f}},
$$

or its cycle-integrated energy equivalent. This suggests a substantive distinction between grid-quality-oriented partial-load optimisation in CHB SHE systems and efficiency-oriented partial-load optimisation in automotive MLIs.

## 6. Reported performance, trade-offs, and limitations

Representative quantitative comparisons reported in the literature show that the strongest improvements often occur precisely in the low-output region where conventional operation is least favorable [2104.09643] [2104.05759] [2104.09642] [1404.2259] [2508.14224].

| Case | Baseline result | Partial-load optimised result |
|---|---|---|
| 5-level CHB, $V_{o,\text{pu}}=0.3$ | THD $\approx 115.76\%$ | THD $\approx 21.75\%$ |
| 7-level CHB, $m=0.4$ | THD $=31.29\%$ | THD $=18.66\%$ |
| 5-level CHB with 12-pulse rectifier, $V_{o,\text{pu}}=0.3$ | THD $=85.91\%$ | THD $=23.83\%$ |
| Solar distributed MLI, $N_{op}=10$ | THD $\approx 5\%$ | Same THD after reconfiguration to $N_{op}=10$ baseline |
| BEV 3L-TNPC vs SiC 2L-B6 | Reference drivetrain loss | $-0.67$ kWh/100 km |

The trade-offs are equally consistent. Variable-DC-link SHE adds converters, sensing, balancing loops, and coordination between DC-link dynamics and angle selection. The 5-level HF-isolated CHB study notes that insufficient DC-link variation range limits benefits at the very lowest outputs, and that slow DC-voltage control can invalidate the assumed angle set. The 7-level study recommends precomputed angle tables and soft DC-voltage transitions rather than arbitrary setpoint steps. The 12-pulse-rectifier approach adds a phase-shifting transformer, two 6-pulse bridges, and firing-angle control to retain a constant effective modulation index [2104.09643] [2104.05759] [2104.09642].

Distributed reconfiguration introduces another class of costs: communication, neighbour reassignment, and fault semantics. The solar-array paper handles heartbeat-detected controller failures and H-bridge stuck-short behavior modeled as zero voltage, but does not address open-circuit failures that would disconnect the series string [1404.2259].

Traction-oriented MLIs substitute chip area, neutral-point balancing, and mode-coverage constraints for the low-$M$ SHE problem. Three-level operation reduces switching energy per event and modulation-induced machine losses, but it also requires split DC links, capacitor ripple management, and device-area allocation across inner and outer switches. In the BEV cost model, battery savings are reported without including the additional semiconductor cost. In the optimisation-based comparison, Y-mode cannot cover the full torque–speed map, and the useful switching-frequency range is bounded by ripple constraints at the low end and high-frequency loss growth at the high end [2508.14224] [2507.03573].

A second common misconception is that partial-load optimisation is synonymous with reducing switching frequency. The literature is more precise. In SHE-based CHB systems, low switching frequency is preserved while DC-link magnitudes are adjusted to recover feasible angle solutions. In solar distributed MLIs, switching times are rescheduled within the same grid period as module availability changes. In traction systems, partial-load benefit comes from lower voltage steps, clamped states, mode switching, and reduced harmonic machine losses rather than from switching-frequency reduction alone [2104.09643] [1404.2259] [2508.14224] [2507.03573].

Taken together, these results define partial-load optimised MLIs as a broad but technically coherent class: converters that explicitly shape their internal voltage levels, active modules, or operating modes so that low-demand operation is not treated as a degraded corner case but as a primary design target.

Source: https://www.emergentmind.com/topics/partial-load-optimised-multi-level-inverter-mli