---
title: Noise-Aware Quantum Architecture Search
url: https://www.emergentmind.com/topics/noise-aware-quantum-architecture-search-na-qas
type: topic
---

# Noise-Aware Quantum Architecture Search

Noise-Aware Quantum Architecture Search (NA-QAS) refers to a class of algorithms and frameworks designed to automatically discover quantum circuit architectures that are optimized for both problem-specific expressivity and resilience to hardware-induced noise. NA-QAS methods explicitly incorporate device noise models, decoherence, and hardware constraints into the search process for parameterized quantum circuits (PQCs) used in variational quantum algorithms (VQAs) and quantum machine learning (QML). This is in contrast to traditional quantum architecture search (QAS), which often assumes a noiseless environment, and thus may return structures that are either intractable or suboptimal under realistic noisy intermediate-scale quantum (NISQ) hardware [2010.10217, 2402.03500, 2402.13754, 2601.10965, 2401.05571, 2112.05779].

## 1. Problem Formulation and Search Space

NA-QAS formalizes the simultaneous optimization of quantum circuit topology (architecture) and its continuous parameters under a noise model. The archetypal objective can be stated as
\[
(\theta^*, a^*) = \arg\min_{a\in S, \theta} \; L(a, \theta; Z, \mathcal{E}_a)
\]
where \(a\) indexes a circuit structure (ansatz) from the architecture pool \(S\), \(\theta\) represents the circuit’s variational parameters, \(L\) is a loss functional that combines task accuracy (e.g., VQE energy, QML classification loss) and an explicit noise penalty, and \(\mathcal{E}_a\) encapsulates the noise map for architecture \(a\) [2010.10217, 2601.10965].

The circuit space may support:
- Structured layers with rotations and entanglement sublayers [2601.10965]
- Variable circuit depth, controlled per instance [2601.10965]
- Binary tensor encodings to represent gate placement and connectivity [2402.03500, 2402.13754]
- Sparse or dynamic architectures incorporating gate growth and pruning [2401.05571]

The bi-objective variant introduces hardware-expressivity cost (
\(\mathcal{C}(A) = \alpha N_{\text{CNOT}}(A) + \beta N_{\text{depth}}(A)\)
); the search then seeks Pareto fronts between target performance (e.g., ground state energy, classification accuracy) and hardware overhead [2601.10965].

## 2. Noise Modeling and Simulation

NA-QAS integrates explicit, gate-local noise descriptions, operating at the level of
- Depolarizing channels: 
  \[
  \mathcal{D}_p(\rho) = (1-p)\rho + \frac{p}{2^k} I
  \]
  where \(p\) is the gate infidelity and \(k\) is the number of qubits [2010.10217, 2402.03500, 2112.05779]
- Bit-flip channels:
  \[
  \epsilon_{\text{BF}}(\rho) = (1-p)I\rho I + p X\rho X
  \]
- Phase-damping and amplitude damping (T1, T2 relaxation) [2601.10965, 2402.13754]
- Measurement/readout errors and crosstalk, using IBMQ or real-device calibration data [2010.10217, 2402.03500, 2402.13754, 2401.05571]

Efficient simulation is achieved via Pauli-transfer matrices (PTMs) in the Liouville basis, fusing gate unitaries and noise superoperators to accelerate state propagation during search (up to 6× over Kraus-based simulators) [2402.03500, 2402.13754]. For on-chip or "real noise" scenarios, experiments operate directly on hardware, leveraging device-provided error models [2401.05571].

## 3. Search Algorithms and Optimization Strategies

NA-QAS instantiates several algorithmic paradigms:

**a) Reinforcement Learning (RL)–Assisted QAS:**  
- State: Tensor encoding of partial circuit plus noise or cost summaries [2402.03500, 2402.13754]
- Action: Discrete gate placements (including choice of qubit, rotation axis, or CNOT connectivity)
- Reward: Composite of task loss and noise-penalizing term. For instance:
  \[
  R_t = 
    \begin{cases}
    +5, & C_t < \xi \\
    -5, & t \geq T_s^e \text{ and } C_t \geq \xi \\
    \max\left\{\frac{C_{t-1}-C_t}{C_{t-1}-C_{\min}}, -1\right\}, & \text{otherwise}
    \end{cases}
  \]
  [2402.03500], or
  \(
  R_t = -\log(C(\theta_t) - \zeta + \lambda N_{\text{gates}}(t))
  \)
  [2402.13754]
- RL Policy: Double Deep Q-Network (DDQN), curriculum learning (moving-threshold), and random-halting (negative-binomial episode truncation) are used to promote rapid, noise-efficient circuit discovery [2402.03500, 2402.13754]. Continual reinforcement learning (Probabilistic Policy Reuse with DQN) has been proposed for rapidly adapting to changing noise conditions [2112.05779].

**b) Evolutionary/Multi-Objective Search:**  
- Enhanced NSGA-II with variable depth and Pareto sorting on target performance and hardware cost [2601.10965]
- Hybrid Hamiltonian ε-greedy parameter sharing across "supernets" to amortize parameter learning and break local optima [2601.10965]

**c) In-Time Sparse Exploration ("QuantumSEA"):**  
- Interleaved gate pruning (via salience scores) and gate growth (via historical gradient averages and randomization)
- Joint topology and parameter optimization under explicit noise constraints and hardware execution budgets [2401.05571]

**d) Joint Structure-Parameter "Supernet" Optimization:**  
- Weight-sharing among a sampled batch of circuit "supernets," combined with adversarial allocation based on noisy loss [2010.10217, 2601.10965]. Avoids quadratic cost scaling of separately-trained ansätze.

**e) SPSA and Adam-based Parameter Training:**  
- Multi-stage, shot-robust SPSA variants for parameter optimization within the architecture search loop, leveraging Adam moment updates and staged measurement budgets [2402.03500].

## 4. Curriculum and Halting Mechanisms

To both favor shorter, less noise-prone circuits and guide the agent's search, NA-QAS frameworks implement:

- Moving-threshold curricula, where the cost/energy threshold is adaptively updated based on running-best, lower-bound proxies, and soft amortization windows [2402.03500, 2402.13754]
- Randomized episode halting, using negative-binomial sampling of episode lengths, which statistically biases search toward low-depth circuits while allowing multicircuit exploration [2402.03500, 2402.13754]

These strategies quantitatively reduce circuit depth and gate counts, promote rapid convergence to noise-resilient solutions, and prevent overfitting to unattainable objectives.

## 5. Empirical Results and Benchmarking

NA-QAS methods have been benchmarked on both quantum chemistry (VQE) and QML tasks, under simulated and real hardware noise. Key performance highlights include:

- "Curriculum reinforcement learning QAS" (CRLQAS) achieves chemical accuracy for VQE (\(1.6\times10^{-3}\) Ha) with circuits significantly shallower and fewer gates than RLQAS, qubit-ADAPT-VQE, and quantumDARTS [2402.03500]
- On IBMQ hardware, NA-QAS circuits consistently reach lower energy errors or higher test accuracies using 40–60% fewer CNOTs and 2–3× shorter depths than hardware-efficient ansätze and fixed-structure baselines [2402.03500, 2010.10217, 2402.13754, 2601.10965]
- On classification and multi-class Iris tasks, NA-QAS under bit-flip/depolarizing/thermal noise outperforms random/evolutionary search, matching or exceeding the best baselines with fewer two-qubit gates and less depth [2601.10965]
- "QuantumSEA" halves quantum gate usage and execution time versus dense or previously known noise-adaptive methods, achieving 1–6% accuracy gains in QML and lower VQE energy estimation errors [2401.05571]
- NA-QAS’s continual RL variants demonstrate substantial speed-ups (2–4× faster convergence) and higher stability in adapting to new, more complex noise patterns over standard DQN [2112.05779]

## 6. Implementation Aspects and Practical Considerations

NA-QAS implementations leverage:
- Advanced quantum circuit and automatic differentiation frameworks (Qiskit, PennyLane, JAX with XLA for GPU-accelerated tensor operations) [2402.03500, 2010.10217, 2402.13754]
- Realistic noise profile imports from daily IBMQ calibrations
- Parameter-shift rule gradient estimation for non-differentiable hardware or classical noise models [2401.05571]
- Classical optimization via Adam, quantum natural gradient, or hybrid strategies across supernet ensembles [2010.10217, 2601.10965]

Enforcement of hardware constraints (coherence windows, gate budgets) is handled by explicit sparsity, execution-time capping, and post-compilation checks [2401.05571]. All key noise mitigation and circuit adaptation strategies have demonstrated practical transfer to real quantum devices.

## 7. Theoretical Guarantees and Regret Analysis

While the search problem is inherently combinatorial, some NA-QAS frameworks establish theoretical guarantees. For example, the supernet-based weight-sharing method achieves zero regret with respect to the best of W supernets per round, outperforming any adversarial bandit by a factor reflecting parallelization (regret \(R_T\leq 0\)), albeit under the caveat of heuristic architecture sampling [2010.10217]. Pareto optimality is guaranteed in multi-objective evolutionary search due to the properties of the NSGA-II update [2601.10965].

---

In summary, Noise-Aware Quantum Architecture Search (NA-QAS) constitutes a sophisticated suite of algorithms for automated PQC architecture discovery under realistic noise. Integrating tensorized circuit encodings, deep reinforcement learning, multi-objective evolutionary strategies, explicit noise modeling, and fast simulation paradigms, NA-QAS delivers both high-fidelity and resource-efficient circuits tailored to NISQ limitations. Empirical benchmarks confirm substantial accuracy, depth, and speed improvements over previous noise-agnostic and fixed-structure approaches [2010.10217, 2402.03500, 2402.13754, 2601.10965, 2401.05571, 2112.05779].

Source: https://www.emergentmind.com/topics/noise-aware-quantum-architecture-search-na-qas