---
title: Controlled Phase (CZ) Gate
url: https://www.emergentmind.com/topics/controlled-phase-cz-gate
type: topic
---

# Controlled Phase (CZ) Gate

A controlled phase (CZ) gate is a fundamental two-qubit entangling operation that applies a conditional phase to the joint quantum state: in the computational basis, it multiplies the |11⟩ state by –1 while leaving |00⟩, |01⟩, and |10⟩ unchanged. It plays a central role in digital quantum computing, quantum error correction, and variational algorithms. CZ gates can be realized via various physical mechanisms, most commonly through controlled Z⊗Z interactions in superconducting qubits, neutral atoms, trapped ions, and photonic architectures. This article reviews the theoretical definition, physical implementation strategies, noise and calibration considerations, error analysis, and advanced protocols associated with the CZ gate, referencing explicit results where available.

## 1. Definition and Unitary Structure

The controlled phase (CZ) gate is the two-qubit gate defined by the unitary
\[
\mathrm{CZ} = \operatorname{diag}(1,1,1,-1)
\]
in the basis {|00⟩, |01⟩, |10⟩, |11⟩}.
This is a special case of the more general controlled-phase family,
\[
\mathrm{CP}(\phi) = \operatorname{diag}(1,1,1, e^{i\phi}),
\]
with CZ = CP(π). The gate acts nontrivially only on the |11⟩ state, imparting a π phase. In the context of variational quantum algorithms, gates of the form \( R_{ZZ}(\gamma) = \exp(-i\gamma Z\otimes Z) \) are generated natively, and can be compiled using either the CZ or a continuously parameterized CP gate [2304.14212].

## 2. Physical Mechanisms for Realization

Implementations of CZ gates span a wide range of platforms; three dominant approaches are highlighted below.

### (a) Superconducting Qubits

- **Native ZZ Interaction:** Many hardware platforms realize a natural ZZ interaction by mediating a coupling between two transmons or similar qubits, leading to RZZ(γ) [2304.14212]. The fixed-angle CZ gate (\(\phi = π\)) is distinguished from continuously tunable CP(φ).
- **Tunable Couplers:** Architectures utilizing tunable couplers (either transmon or fluxonium) enable high-fidelity CZ gates with control over both the qubit-qubit coupling strength and the residual ZZ interaction. Techniques using a dynamically decoupled regime (DDR) apply the coupling only when needed to suppress leakage [1912.10721]. Fluxonium mediators provide exact or near-exact cancellation of residual ZZ even at large detunings, extending flexibility beyond previously available transmon-only approaches [2511.02115].
- **Single-Step and STA Protocols:** Shortcut-to-adiabaticity (STA) and sudden Net-Zero (SNZ) pulse engineering enable gates operating at or near the speed limit for transverse couplings, minimizing leakage and achieving high fidelities in O(10–50) ns [1811.08096, 2008.07411].
- **Energy-Level Engineering:** Designs exploiting matching (or engineered) anharmonicity allow resonant, nonadiabatic protocols with sub-20 ns intrinsic CZ times and errors below \(10^{-4}\) [2510.09461].

### (b) Neutral Atom Platforms

- **Rydberg Blockade:** CZ is realized by adiabatically dressing the ground state of two neutral atoms within the Rydberg blockade regime. Both continuous and pulsed optical protocols support either fixed or continuously parameterized entangling phase, with error budgets decomposed into spontaneous emission, motional dephasing, and nonadiabatic errors [2201.05994, 1411.2622].
- **Pulse Shaping:** Single-temporal-modulation and STIRAP-like protocols enable flexible and robust phase accumulation while remaining insensitive to amplitude fluctuations and various technical imperfections [2201.05994].

### (c) Photonic and Continuous-Variable Systems

- **Integrated Optics and Metasurfaces:** Probabilistic linear-optical circuits relying on postselected Hong-Ou-Mandel interference (e.g., in Si photonics, metasurfaces) implement CZ via passive networks of beam splitters; program photon states can determine the phase imparted [2110.06664, 2405.10154].
- **Cavity Nonlinearities:** Dynamically coupled optical cavities using χ^(2) or χ^(3) nonlinearities provide deterministic or postselected CZ, with gate fidelity limited by loss and nonlinear status [1909.05751].
- **Continuous Variables:** In measurement-based models, the CV version of CZ is teleported via four-mode Gaussian cluster states and homodyne measurements [1107.0514].

## 3. Noise, Error Models, and Calibration

### Analytical Error Models

In superconducting architectures, errors are dominated by two channels:
- **Coherent Over-Rotation:** A small phase error ε in the CP or CZ pulse. For the diagonal CP(φ) gate,
  \[
  F_{\mathrm{CP}}^{\mathrm{co}}(\varepsilon) = \frac{25 + 7\cos\varepsilon}{32}
  \]
  and for the decomposed CZ, the fidelity is weakly γ-dependent at low ε but develops significant γ-sensitivity as ε increases [2304.14212].

- **Depolarizing Errors:** 
  \[
  F_{\mathrm{CP}}^{\mathrm{de}}(p) = 1 - 0.8p, \quad F_{\mathrm{CZ}}^{\mathrm{de}}(p) \approx 1 - 1.54p
  \]
  for small depolarizing strengths p [2304.14212].

Combined effects multiply the above, e.g.:
\[
F_{\mathrm{CZ}}(\gamma, \varepsilon, p) \approx \left[1 - \varepsilon^2 (0.30 + 0.04\sin\gamma + 0.17\cos\gamma)\right] \times (1 - 1.54p)
\]

### Calibration Strategies

- **Virtual Z Decomposition:** Single fixed-angle CZ can be used for all gates; arbitrary phase gates RZZ(γ) are achieved by supplementing with virtual Z rotations on each qubit, realized by instantaneous frame updates. This drastically reduces the calibration overhead compared to fine-tuning a continuous-parameter CP gate for every γ [2304.14212].

- **Gate Tune-Up:** Simple crosshair landscapes in pulse-parameter space enable efficient calibration. STA and SNZ protocols rely on rapid, few-parameter sweeps with direct measurement of conditional phase and leakage [2008.07411].

## 4. Gate Fidelity Benchmarks and Regimes of Validity

The achievable fidelity and performance of a CZ gate is a function of the physical platform, gate duration, coherence times, and error model regime. Table 1 summarizes performance for representative superconducting and neutral-atom hardware.

| Platform                | Realization                             | Duration   | Fidelity        | Dominant Error Source      |
|-------------------------|-----------------------------------------|------------|-----------------|---------------------------|
| SCQ tunable coupler     | DDR geometric                           | 119 ns     | 98.3%           | T1/T2 decoherence         |
| SCQ floating coupler    | Fast adiabatic + AWP                    | 24 ns      | >99.9%          | Decoherence, leakage      |
| SCQ SNZ                 | Sudden, maximal intermediate leakage    | 32 ns      | 99.93%          | Dephasing, leakage        |
| SCQ energy-level eng.   | Triple resonance, nonadiabatic          | 17 ns      | >99.99%         | Coherent leakage          |
| Neutral atom, adiabatic | Single-pulse, Rydberg blockade          | <1 μs      | 99.7%           | Spontaneous emission      |
| Neutral atom, dressing  | Adiabatic, Doppler-free                 | 2.3 μs     | 99.8%           | Doppler, blockade         |
| Si photonic circuit     | Postselection, integrated optics        | —          | >99% (postselected) | Loss, splitting ratio     |

Coherence-limited errors become dominant in O(10–100 ns) gates for superconductors. Methods such as dynamically decoupled protocols, idling ZZ=0 operation, and floating/fluxonium couplers enable both minimal residual coupling and high-speed operation, with fidelities compatible with thresholds for error-corrected architectures [2604.05048, 2511.02115].

## 5. Circuit Compilation, Synthesis, and Hardware Mapping

- **ZX Calculus and Circuit Extraction:** Advanced diagrammatic tools (e.g., the ZX calculus) support the detection and extraction of CZ gates directly from native circuit representations, allowing for gate optimization on neutral-atom hardware where multi-qubit controlled-phase gates are natively supported. For CZ, the phase-gadget network reduces to a single two-ary gadget, enabling direct mapping to a single hardware-native two-qubit operation without introducing unnecessary Hadamards or additional pulses [2403.10864].

- **Virtualization and Error-Reduction:** The use of virtual Z gates and fixed-angle calibrated entanglers is not only operationally convenient but also minimizes accumulated calibration drift and non-Markovian errors in near-term devices [2304.14212].

## 6. Extensions, Advanced Protocols, and Emerging Directions

- **Partial Erasure-Error Detection:** Recent schemes (e.g., all-microwave CZ with a transmon coupler) instrument partially destructive measurement or mid-circuit detection to flag erasure errors, facilitating erasure-aware quantum error correction [2511.01260].
- **Scalability and Integration:** Techniques to simultaneously suppress static ZZ coupling and enable rapid adiabatic phase gates without sacrificing single-qubit gate fidelity are foundational for scaling up to large error-corrected arrays [2604.05048, 2511.02115].
- **Programmable and Broadband Devices:** Integrated phase-programmable circuits and meta-optical platforms support arbitrary controlled-phase gates, broadening the range of applications and allowing for on-the-fly circuit reconfiguration [2110.06664, 2405.10154].

## 7. Theory-Performance Connection and Outlook

Advances in controlled phase gate architectures enable a broad tradeoff between speed, robustness, and calibration simplicity. Fixed-angle CZ gates—augmented by low-overhead virtual Z protocols—offer practical, high-fidelity entanglement for current quantum hardware, provided that hardware supports adequately low coherent and incoherent errors (p ≲ 0.03%, ε ≲ 0.8%) [2304.14212]. Floating and fluxonium couplers, geometric gate protocols, and sophisticated pulse engineering (AWP, DDR, SNZ) collectively expand the domain of reliable, low-leakage, fast entangling gates essential for near-term and fault-tolerant circuits. For platforms supporting continuous phase tunability, adiabatic and pulse-shaped methods provide robust, highly flexible multi-qubit entanglement, with clear paths to hardware-optimized circuit synthesis and error mitigation.

Source: https://www.emergentmind.com/topics/controlled-phase-cz-gate