---
title: Arithmetic Width in Computation
url: https://www.emergentmind.com/topics/arithmetic-width
type: topic
---

# Arithmetic Width in Computation

Searching arXiv for recent and foundational uses of “arithmetic width” across algebraic complexity, computer arithmetic, and discrete geometry.
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Arithmetic width is a domain-dependent notion of bounded intermediate complexity. In algebraic complexity, it is the width parameter \(w\) of a read-once oblivious arithmetic branching program (ROABP) or of a constant-width arithmetic circuit, measuring the size of the largest intermediate matrix or layer. In computer arithmetic, it is the total bit-width or word-length that controls dynamic range and precision. In discrete geometry, it is the number of distinct values an integer linear functional attains on the lattice points of a convex body. Across these settings, width serves as a structural restriction that simultaneously limits expressivity and enables stronger algorithmic results, especially for polynomial identity testing, customized-precision arithmetic, and lattice-slice analysis [1601.08031][2212.04184][2509.04726].

## 1. Arithmetic width in algebraic computation

An Arithmetic Branching Program (ABP) is a layered directed acyclic graph computing a polynomial by summing over source–sink path-weights. In matrix form, an ABP of length \(n\) and width \(w\) over a field \(\mathbb{F}\) is a sequence
\[
D_1(x_{i_1})\in\mathbb{F}[x_{i_1}]^{1\times w},\quad
D_2(x_{i_2})\in\mathbb{F}[x_{i_2}]^{w\times w},\dots,
D_n(x_{i_n})\in\mathbb{F}[x_{i_n}]^{w\times 1},
\]
computing
\[
f(x_1,\dots,x_n)=D_1(x_{i_1})D_2(x_{i_2})\cdots D_n(x_{i_n})\in\mathbb{F}[x_1,\dots,x_n].
\]
Its width \(w\) is the size of the largest intermediate matrix, and the total size is the cost of representing all the univariate entries. When each layer is a univariate polynomial in a different variable, the ABP is oblivious; if each variable appears exactly once, it is a read-once oblivious ABP. In this setting, the width \(w\) of an ROABP is often called the arithmetic width of the polynomial it computes [1601.08031].

This width parameter has an operational interpretation. It measures the “space” needed to build up a polynomial in a one-pass read of the variables, or, in the non-commutative viewpoint, the matrix-multiplication dimension required by the computation. Small width imposes strong structural constraints. The ROABP literature uses those constraints to obtain stronger black-box PIT algorithms than were known for general arithmetic circuits [1601.08031].

A related notion appears in layered arithmetic circuits. If non-leaf nodes are partitioned into layers \(V_1,V_2,\dots,V_t\), then the width is
\[
\max_{i>1}|V_i|.
\]
A layered circuit is staggered if in every layer \(i>1\) at most one gate is not of the form “multiply by \(1\)” from the previous layer; equivalently, staggered width-\(w\) circuits are exactly straight-line programs with \(w\) registers. Here too, width bounds how many partial values can be kept alive at once, restricting how much parallelism or mixing of variables the circuit can perform [0907.3780].

## 2. Hitting sets and derandomization for bounded-width ROABPs

The ROABP identity-testing results of Gurjar, Korwar, and Saxena sharpen the algorithmic meaning of arithmetic width. For the known-order model,
\[
\mathcal{C}_{\mathrm{ord}(n,d,w)}=
\left\{
f\in\mathbb{F}[x_1,\dots,x_n]\;\middle|\;
\deg_{x_i}(f)\le d,\;
f\text{ is computed by a width-}w\text{ ROABP in the fixed order }(x_1,\dots,x_n)
\right\},
\]
if \(\mathrm{char}(\mathbb{F})=0\) or \(\mathrm{char}(\mathbb{F})>n\,d\,w^{\log n}\), one can deterministically construct in time
\[
\bigl(n\,d\,w^{\log n}\bigr)^{O(1)}
\]
a hitting set of size
\[
|H|=O\bigl(n\,d\,w^{\log n}\bigr)=n^{O(\log w)}\cdot\bigl(d\,w^{O(1)}\bigr).
\]
In particular, for constant \(w\) this is a truly polynomial-size hitting set. For the any-order model,
\[
\mathcal{C}_{\mathrm{any}(n,d,w)}=
\left\{
f\in\mathbb{F}[x_1,\dots,x_n]\;\middle|\;
\deg_{x_i}(f)\le d,\;
f\text{ has width-}w\text{ ROABPs in every variable order}
\right\},
\]
one can build over any field a hitting set of size
\[
(ndw)^{O(\log\log w)}.
\]
These improve the previously known bounds and mark the first polynomial-size hitting set for constant-width ROABP in the known-order case [1601.08031].

The structural core of the known-order argument is the rank of the partial-derivative matrix. For a bivariate polynomial
\[
f(x_1,x_2)=\sum_{i,j} a_{i,j}x_1^i x_2^j,
\]
the matrix
\[
M_f=[a_{i,j}]_{0\le i,j\le d}
\]
satisfies a rank-width relation: if
\[
f(x_1,x_2)=\sum_{r=1}^w g_r(x_1)h_r(x_2),
\]
then \(\mathrm{rank}(M_f)\le w\). This is used to prove that the substitution
\[
(x_1,x_2)\mapsto (t^w,\;t^w+t^{w-1})
\]
preserves nonzeroness for width-\(w\) ROABP polynomials. The proof then iterates a variable-halving lemma: if \(f(x_1,\dots,x_{2m})\) has a width-\(w\) ROABP in the order \((x_1,\dots,x_{2m})\), then substituting
\[
(x_{2i-1},x_{2i})\mapsto (t_i^w,\;t_i^w+t_i^{w-1})
\]
for \(i=1,\dots,m\) yields a nonzero polynomial in \(\mathbb{F}[t_1,\dots,t_m]\) still computable by a width-\(w\) ROABP in the order \((t_1,\dots,t_m)\). After \(\log n\) rounds one gets a univariate test of degree \(nd\,w^{\log n}\) [1601.08031].

The any-order argument proceeds differently. First, a low-degree bivariate shift forces all small ROABPs of width \(w\) in any order to become \(\ell\)-concentrated, where every coefficient of a large-support monomial lies in the span of coefficients of support \(<\ell\), for \(\ell=O(\log w)\). The proof uses a basis-isolating weight assignment and the fact that shifting by a basis-isolating map yields \(\log(\dim\mathcal{A}+1)\)-concentration in any algebra \(\mathcal{A}\). Second, once \(f\) is known to have an \(\ell\)-support monomial with nonzero coefficient, black-box testing reduces to an \(\ell\)-variate ROABP in any order of width \(w\) and individual degree \(O(nd)\), recovering the \((ndw)^{O(\log\log w)}\) bound [1601.08031].

## 3. Constant-width arithmetic circuits and lower bounds

Width is not only an algorithmic aid; it is also a source of lower bounds. For every \(k>1\), Arvind, Joglekar, and Srinivasan construct an explicit polynomial that can be computed by a linear-sized monotone circuit of width \(2k\) but has no subexponential-sized monotone circuit of width \(k\). Their family \(P_k^\ell\) is defined recursively, is homogeneous of degree \(\ell^k\) on \(\ell^{2k}\) variables, and has exactly
\[
\ell^{\frac{\ell^k-1}{\ell-1}}
\]
distinct monomials. The separation theorem states that for fixed \(k\ge 2\), for all sufficiently large \(\ell\), any monotone width-\(k\) circuit \(C\) with
\[
\mathrm{mon}(C)\subseteq \mathrm{mon}(P_k^\ell)
\quad\text{and}\quad
|\mathrm{mon}(C)|\ge \tfrac12 |\mathrm{mon}(P_k^\ell)|
\]
must have size
\[
|C|=2^{\Omega(\ell)}.
\]
On the other hand, \(P_k^\ell\) admits a width-\(2k\) monotone circuit of size \(O(\ell^k)\) [0907.3780].

This yields infinite hierarchies. For every fixed \(k\), the class of monotone width-\(k\) circuits is strictly contained in monotone width-\(2k\) circuits for infinitely many input sizes, so the monotone constant-width hierarchy is infinite. Because width-\(2k\) staggered circuits can be unfolded into depth-\(2k\) circuits of polynomial blow-up, the same strictness holds for the monotone constant-depth hierarchy. The argument also carries over to the noncommutative setting [0907.3780].

The same paper develops hardness–randomness tradeoffs for identity testing constant-width commutative circuits. Two technical lemmata are central: if \(f(x_1,\dots,x_n)\) of total degree \(m\) has a staggered width-\(w\), size-\(s\) circuit, then each homogeneous component \(H_i(f)\) has a staggered width-\((w+O(1))\), size \(\mathrm{poly}(s,m)\) circuit; and if \(P(x,y)\) has a staggered width-\(w\), size-\(s\) circuit and \(\deg_y P=r\), then under \(\mathrm{char}(\mathbb{F})>r\), any annihilated series \(f(x)\) with \(P(x,f(x))\equiv 0\) admits a staggered circuit of width \(w+O(1)\) and size \(\mathrm{poly}(s,(m+r)^r)\). These ingredients support a Nisan–Wigderson-style generator and a deterministic subexponential-time PIT for width-\(w\) circuits under suitable lower-bound assumptions [0907.3780].

A common misconception is to identify bounded width with a mere size bound. The circuit results indicate that width is a finer-grained restriction: linear-size width-\(2k\) computations can be inaccessible to subexponential-size width-\(k\) computations, even in monotone models. This suggests that arithmetic width controls a qualitative resource, not only a quantitative one [0907.3780].

## 4. Arithmetic width as word-length in computer arithmetic

In digital number representation, arithmetic width is the total bit-width allocated to a datum. The total bit-width \(w\), sometimes called word-length, is the single most critical parameter because it must be apportioned between range and precision. In signed fixed-point \(Qm.n\), the total width is
\[
w=m+n,
\]
where \(m=\mathrm{IWL}\) is the integer-part word-length, including the sign bit, and \(n=\mathrm{FWL}\) is the fractional-part word-length. If \(x_{\mathrm{int}}\) is the \(w\)-bit two’s-complement integer, then
\[
x_{\mathrm{fxpt}}=x_{\mathrm{int}}\cdot 2^{-n},
\]
with representable range
\[
[-2^{m-1},\;2^{m-1}-2^{-n}]
\]
and quantization step
\[
\Delta=q=2^{-n}.
\]
In radix-2 floating-point, the total width is partitioned as
\[
W=1+W_e+W_f,
\]
and a real value is represented as
\[
x_{\mathrm{flpt}}=(-1)^s\cdot 1.\mathrm{mantissa}\cdot 2^e.
\]
Two immediate consequences are the dynamic range
\[
R_{fp}=2^{W_{e,\max}+1}-2^{-W_f}
\]
and the unit round-off
\[
\varepsilon=2^{-W_f}.
\]
These formulas make explicit that width governs both dynamic range and resolution [2212.04184].

At the operator level, the reported 28 nm FDSOI, 200 MHz synthesis results show that the effect of width depends strongly on representation.

| Operator | Area, delay | Energy |
|---|---|---|
| 32-bit float add | 653 \(\mu\mathrm{m}^2\), 2.42 ns | \(1.06\) fJ |
| 32-bit int add | 189 \(\mu\mathrm{m}^2\), 1.06 ns | \(0.038\) fJ |
| 32-bit float mul | 1543 \(\mu\mathrm{m}^2\), 2.09 ns | \(1.87\) fJ |
| 32-bit int mul | 2289 \(\mu\mathrm{m}^2\), 2.38 ns | \(0.16\) fJ |

The data imply distinct tradeoffs. The 32-bit float adder is approximately \(3.5\times\) larger, approximately \(2.3\times\) slower, and approximately \(27\times\) more energy than the 32-bit integer adder. By contrast, the 32-bit float multiplier is area-smaller but approximately \(11\times\) more energy because of exponent and shift management. In the width sweep from 8 to 16 bits, floating-point adders are always approximately \(3\times\) larger, approximately \(3\times\) slower, and \(5\)–\(12\times\) more energy, while floating-point multipliers are smaller in area, slightly faster, but still \(2\)–\(10\times\) more energy [2212.04184].

Application-level studies refine that picture. For 8-bit 2-D K-Means, the floating-point format \(\mathrm{ct\_float}_8(5\mathrm{exp},2\mathrm{mant})\) is approximately \(2\times\) bigger and its distance kernel consumes approximately \(2.4\times\) more energy than \(\mathrm{ac\_fixed}_8(Q_{3.5})\), yet it converges in half as many iterations and yields \(10\times\) lower CMSE and roughly half the misclassification rate. For 16-bit K-Means, the converse holds: fixed-point \(Q_{13.3}\) is both smaller, uses \(1.7\times\) less energy overall, and reaches equal or better CMSE and ER than float\(_{16}\). For FFT-16, fixed-point consistently beats floating-point for any equal total width, both in energy per operation and in MSE, because the dynamic range is modest and a 7-bit exponent in floating-point wastes bits that could have boosted the mantissa [2212.04184].

These results support an application-contingent view of arithmetic width. Fixed-point is almost always smaller, faster, and lower-energy per operation than floating-point when uniform quantization and explicit scaling are acceptable. Floating-point becomes advantageous when automatic scaling over a wide dynamic range materially improves convergence or prevents saturation and overflow [2212.04184].

## 5. Customized precision and non-native-width arithmetic

When the desired arithmetic width is not supported natively, recent work treats width itself as a software- or compiler-controlled design variable. The SAMD method, “Scalar Arithmetic Multiple Data,” embeds a vector architecture with custom bit-width lanes inside fixed-width scalar arithmetic. For native register width \(W\), virtual lane width \(b\), and \(s\) spacer bits per lane, one uses
\[
k=\left\lfloor \frac{W}{b+s}\right\rfloor
\]
lanes. Spacer bits prevent carries or overflows from bleeding between lanes, and ordinary scalar arithmetic plus bitwise operations implements lane-wise add, sub, mul, and even 1-D convolution. The paper reports a maximum speedup of approximately \(6\times\) on an Intel platform and approximately \(10\times\) on an ARM platform versus quantization to native 8-bit integers; on Cortex-A57, the temporary-spacer configuration reaches approximately \(2\times\) at 6-bit, \(6\times\) at 4-bit, \(8\times\) at 3-bit, and \(10\times\) at 2-bit, while permanent spacer reaches up to \(12\times\) at 2-bit [1809.10572].

The essential point is that width below 8 bits can be exploited without specialized hardware. One scalar multiply can simultaneously compute all \(k\) lanes of partial products, so for small convolution kernels the overall multiply-plus-add count can drop substantially. The method therefore targets a regime in which custom widths are not merely storage formats but active algorithmic accelerants [1809.10572].

A different non-native-width strategy appears in multi-word modular arithmetic for cryptographic kernels. In MoMA, if \(w\) is the machine-word size and \(b\) the required integer bit-width, each \(b\)-bit integer is represented as
\[
X=\sum_{i=0}^{m-1} x_i R^i,\qquad R=2^w,\qquad m=\lceil b/w\rceil.
\]
A rewrite system recursively splits every \(2\omega\)-bit type into two \(\omega\)-bit halves, replaces high-level add, sub, mul, and mod by multi-word sequences, prunes limbs known to be zero for non-power-of-two widths, and continues until all operations fit in the native word size. The implementation integrates this pass into SPIRAL and combines it with Barrett reduction, fused add-with-carry when \(\omega=w\), and rule selection between schoolbook and Karatsuba multiplication [2501.07535].

The reported GPU results make arithmetic width an explicit performance knob. For BLAS Level-1 operations on 128–1024-bit widths, MoMA outperforms GRNS by \(13\)–\(30\times\) and GMP by \(500\)–\(3\,000\times\) for add/sub, and by \(10\)–\(15\times\) for mul/axpy. For NTT, 256-bit performance on RTX 4090 is \(14\times\) faster than ICICLE on H100 and within \(1.2\times\) of an ASIC; for 128-bit NTT, MoMA on RTX 4090 outperforms an FHE ASIC by \(1.3\times\), and on H100 by \(1.4\times\). The paper also notes that non-power-of-two widths such as 381 and 753 bits avoid zero-padding and gain \(2\)–\(3\times\) speedups over naively padded code, while dynamically varying precision is not supported because kernels must fix \(b\) at compile time [2501.07535].

Taken together, SAMD and MoMA show that arithmetic width can be virtualized. In one case, width is packed into scalar registers; in the other, it is decomposed into limbs and lowered by compiler rewrites. Both approaches treat width as a first-class compilation parameter rather than a fixed ISA feature [1809.10572][2501.07535].

## 6. Arithmetic width of convex bodies

In discrete geometry, arithmetic width has a different and more literal meaning. For a convex body \(K\subset\mathbb{R}^n\) and a nonzero integer vector \(u\in\mathbb{Z}^n\), let
\[
AR_u(K)=\{\langle u,x\rangle : x\in K\cap\mathbb{Z}^n\}\subset\mathbb{Z}.
\]
The arithmetic width of \(K\) in direction \(u\) is
\[
aw(K,u)=|AR_u(K)|,
\]
the number of distinct integer values attained by \(\langle u,x\rangle\) on lattice points of \(K\). Equivalently, it is the number of integer-normal hyperplanes slicing \(K\) that actually contain lattice points [2509.04726].

This definition refines lattice width. The classical directional lattice width is
\[
w_u(K)=\max_{x\in K}\langle u,x\rangle-\min_{x\in K}\langle u,x\rangle,
\]
and the global lattice width is \(w(K)=\min_{u\neq 0}w_u(K)\). Since \(\langle u,x\rangle\) ranges over an integer interval, one has
\[
aw(K,u)\le w_u(K)+1.
\]
Equality holds exactly when there are no gaps: every integer \(j\) between \(\lceil \min f\rceil\) and \(\lfloor \max f\rfloor\) occurs as \(\langle u,x\rangle\) for some lattice point \(x\in K\). Arithmetic width is therefore sensitive to missing slices that the classical lattice width does not detect [2509.04726].

The main structural theorem states that for a convex body \(K\subset\mathbb{R}^d\) whose affine span contains a lattice point, and \(u\in\mathbb{Z}^d\setminus\{0\}\), there exist constants \(N,t,t',\lambda\) depending only on \(K,u\) such that for all integers \(n\ge N\),
\[
AR_u(nK)\cap [nm+t,\;nM-t']
\]
is exactly an arithmetic progression of step \(\lambda\), where
\[
m=\min_{x\in K}\langle u,x\rangle,\qquad M=\max_{x\in K}\langle u,x\rangle.
\]
All gaps occur in two bounded end intervals. For rational polytopes \(P\), the fixed-direction function \(n\mapsto aw(nP,u)\) is eventually a quasipolynomial of degree \(1\) and period dividing \(\mathrm{denom}(P)\), and the minimized global arithmetic width \(aw(nP)=\min_{u\neq 0}aw(nP,u)\) is again eventually quasipolynomial of degree \(1\), with optimizing directions recurring periodically [2509.04726].

The algorithmic theory is dimension-sensitive. For fixed dimension \(d\) and rational input size \(L\), \(aw(P,u)\) can be computed in polynomial time by first using Barvinok’s algorithm to compute a short rational generating function
\[
g_P(x)=\sum_{z\in P\cap\mathbb{Z}^d} x^z,
\]
then applying the monomial substitution \(x_i\mapsto t^{u_i}\) to obtain a univariate rational function
\[
h(t)=\sum_{z\in P\cap\mathbb{Z}^d} t^{\langle u,z\rangle},
\]
whose distinct exponents are exactly \(AR_u(P)\). Computing the global minimum \(aw(P)\) is reduced to a finite, though at worst exponential, set of candidate directions orthogonal to differences of lattice points [2509.04726].

This notion should not be confused with mean width in convex geometry. Mean width of a convex body \(C\subset\mathbb{R}^n\) is defined by
\[
W(C)=\frac{1}{\omega_{n-1}}\int_{S^{n-1}} w_C(u)\,d\sigma(u)
\]
with \(w_C(u)=h_C(u)+h_C(-u)\), a spherical average of directional widths. Arithmetic width of a convex body, by contrast, counts attained integer levels on lattice points. The two notions address different questions: one is an averaged metric of continuous support geometry, the other a discrete measure of lattice occupation [1111.4976][2509.04726].

Source: https://www.emergentmind.com/topics/arithmetic-width