---
title: '4H-SiC LGADs: High-Voltage, Fast Timing Detectors'
url: https://www.emergentmind.com/topics/4h-sic-low-gain-avalanche-detectors-lgads
type: topic
---

# 4H-SiC LGADs: High-Voltage, Fast Timing Detectors

4H-SiC low gain avalanche detectors (LGADs) are semiconductor particle detectors that embed a thin internal multiplication layer within a depleted 4H-SiC drift structure in order to obtain controlled avalanche amplification while retaining the material advantages of 4H-SiC, notably low leakage, high breakdown capability, thermal stability, and radiation tolerance. In the published literature, the field has advanced from analytical and TCAD feasibility studies to fabricated single-pad devices, next-generation implanted structures, beta-source timing measurements, high-voltage trench-terminated designs, and segmented strip and pixel demonstrators [2206.10191], [2405.18112], [2504.09264], [2509.04638], [2510.14531], [2605.17192].

## 1. Material basis and emergence of the 4H-SiC LGAD concept

The motivation for 4H-SiC LGADs is rooted in the intrinsic properties of 4H-SiC as a detector material. The literature summarized here reports a bandgap of $E_g \approx 3.23$–$3.26\,\mathrm{eV}$, electron mobility $\mu_n \approx 900$–$1000\,\mathrm{cm^2/V\cdot s}$, hole mobility $\mu_p \approx 110$–$120\,\mathrm{cm^2/V\cdot s}$, saturation drift velocities of about $2.0\times10^7\,\mathrm{cm/s}$ for electrons and $8\times10^6\,\mathrm{cm/s}$ for holes, and a primary ionization signal lower than in silicon, quoted as $\simeq 70\%$ of Si or $57\,\mathrm{e^-h^+/}\mu\mathrm{m}$ in SiC versus $75\,\mathrm{e^-h^+/}\mu\mathrm{m}$ in Si [2203.08554], [2509.04638], [2601.16925]. These parameters explain the central design trade-off of the field: 4H-SiC supports high electric fields and low dark current, but the smaller primary signal relative to Si makes internal charge multiplication especially important for timing and minimum-ionizing-particle detection.

The research trajectory is unusually compressed. Early work framed 4H-SiC LGADs as a route to fast timing in harsh environments and established analytic and TCAD design windows for gain-layer thickness and doping [2203.08554], [2206.10191]. A later simulation study introduced the RASER framework and reported a simulated time resolution of $(35.0 \pm 0.2)\,\mathrm{ps}$ at $-800\,\mathrm{V}$ for a proposed 4H-SiC LGAD timing device [2306.09576]. Experimental work then moved rapidly: SICAR was reported as the first fabricated 4H-SiC LGAD [2405.18112]; newly developed onsemi devices provided initial TCT and laboratory data across multiple wafers [2504.09264]; beta-source timing reached $61\,\mathrm{ps}$ [2509.04638]; a trench-isolated $30\,\mu\mathrm{m}$ design was optimized in Sentaurus for operation up to $1\,\mathrm{kV}$ reverse bias with breakdown above $2.4\,\mathrm{kV}$ [2510.14531]; and segmented 4H-SiC LGADs with strip and pixel geometries were subsequently fabricated and characterized [2605.17192].

## 2. Device architectures, layer stacks, and process strategies

Published 4H-SiC LGADs span both epitaxial-gain and implanted-gain realizations. SICAR employed an epitaxially grown five-layer $\mathrm{P^{++}/N^+\,gain/N^-\,bulk/N\,buffer/N^{++}\,substrate}$ stack, with a gain layer roughly $0.95\,\mu\mathrm{m}$ thick and an $\sim 50\,\mu\mathrm{m}$ bulk [2405.18112]. onsemi devices instead used an N-type substrate and epi wafer with a shallow $p^+$ multiplication implant about $1\,\mu\mathrm{m}$ below the front surface, in $30\,\mu\mathrm{m}$ and $50\,\mu\mathrm{m}$ epitaxial variants and with JTE edge structures for $>1\,\mathrm{kV}$ breakdown [2504.09264]. A separate high-voltage design used a fully epitaxial $30\,\mu\mathrm{m}$ stack with a $2.4\,\mu\mathrm{m}$ thick $n^+$ gain layer and a termination scheme combining deep etched trenches with deep $p^+$ JTE implants [2510.14531].

| Platform | Representative structure | Reported features |
|---|---|---|
| SICAR | $\mathrm{P^{++}/N^+/N^-/N/N^{++}}$ epitaxial stack; gain layer $\sim0.95\,\mu\mathrm{m}$; bulk $\sim50\,\mu\mathrm{m}$ | Gain about 2 at $150\,\mathrm{V}$; CCE $90\%$ at $100\,\mathrm{V}$ |
| onsemi next-generation LGADs | Shallow $p^+$ gain implant $\sim1\,\mu\mathrm{m}$ below surface; $30$ or $50\,\mu\mathrm{m}$ epi; JTE periphery | $M \simeq 5$ at $400\,\mathrm{V}$ to $15$–$20$ at $800\,\mathrm{V}$ |
| Trench-isolated $30\,\mu\mathrm{m}$ design | $n^+$ gain layer $2.4\,\mu\mathrm{m}$ thick in a $30\,\mu\mathrm{m}$ stack; deep trench + deep $p^+$ JTE | Full depletion below $500\,\mathrm{V}$; breakdown above $2.4\,\mathrm{kV}$ |

Processing routes reflect the constraints of SiC technology. Reported flows include epitaxial growth at $1500$–$1600\,^\circ\mathrm{C}$, high-temperature implant activation near $1600\,^\circ\mathrm{C}$, mesa definition by RIE, and passivation using thermal and PECVD $\mathrm{SiO_2}$ [2408.12744], [2504.09264]. Contact stacks include Ni/Ti/Al, Ti/Al, and Ti/Ni-based schemes, with rapid thermal anneals at $800$–$1050\,^\circ\mathrm{C}$ or $1000\,^\circ\mathrm{C}$ depending on the polarity and process integration [2405.18112], [2408.12744]. In SICAR, optimization of the metal-semiconductor interface led to a best Ni/Ti/Al recipe of $50/15/80\,\mathrm{nm}$ annealed at $1050\,^\circ\mathrm{C}$, yielding $2.4\,\mathrm{nA}$ at $400\,\mathrm{V}$ reverse bias [2405.18112]. In the trench-terminated high-voltage design, the guard structure used sidewalls passivated with $700\,\mathrm{nm}$ $\mathrm{SiO_2}$ plus $500\,\mathrm{nm}$ $\mathrm{Si_3N_4}$, emphasizing the transfer of SiC power-device termination practice into detector design [2510.14531].

## 3. Electrostatics, avalanche multiplication, and modeling conventions

The operating principle is the deliberate creation of a localized high-field region whose depletion precedes or coincides with bulk depletion but remains below catastrophic breakdown over the intended bias range. Across the literature, the impact-ionization coefficients are parameterized in Chynoweth-like form,
$$
\alpha_n(E)=A_n\exp(-B_n/E), \qquad \alpha_p(E)=A_p\exp(-B_p/E),
$$
and the multiplication is written either as
$$
M=\exp\!\left[\int_0^d \alpha(E(x))\,dx\right]
$$
or, in low-gain approximation,
$$
M \simeq \frac{1}{1-\int_0^d \alpha_n(x)\,dx}.
$$
The detailed form varies by paper, but the central electrostatic problem is consistent: the gain layer must sustain fields of order $2$–$3\,\mathrm{MV/cm}$ or higher while the full structure remains depletable at acceptable bias [2405.18112], [2510.14531].

Analytical design studies made the depletion–breakdown constraint explicit through
$$
V_{\rm FD}<U<V_{\rm BD}.
$$
In one TCAD study, solving for $V_{\rm FD}<500\,\mathrm{V}$ and $M(U=500\,\mathrm{V})\approx10$ identified an allowed region in which $d_{\rm gain}=0.5\,\mu\mathrm{m}$ and $N_{\rm gain}^{\rm eff}\approx 2\times10^{17}$–$4\times10^{17}\,\mathrm{cm^{-3}}$ offered a practical compromise; two field-shaping variants were then compared, a “triangle” design and a more gradual “trapezoid” design [2206.10191]. The triangle design reached Gain $\approx 12$ at $500\,\mathrm{V}$, while the trapezoid design reached Gain $\approx 10$ and offered a wider safe bias range [2206.10191]. This distinction remains relevant in later work, where edge termination and field uniformity become dominant determinants of usable bias.

A notable point in the literature is that the multiplication convention is not uniform. Some summaries treat the gain primarily through electron-initiated coefficients $\alpha_n$ and corresponding low-gain approximations [2405.18112], [2510.14531], whereas others state that in 4H-SiC avalanches are predominantly hole-initiated or hole-dominated, with $\alpha_p \gg \alpha_n$ [2203.08554], [2507.23062]. This suggests that comparisons of published gain laws require careful attention to device polarity, layer ordering, and the adopted ionization model rather than only to the nominal value of $M$.

The numerical toolchain is correspondingly diverse. Sentaurus TCAD appears in quasi-1D, 2D, and guard-termination studies, including quasistationary I–V/C–V sweeps, Mixed-Mode AC at $10\,\mathrm{kHz}$, and HeavyIon transients [2510.14531]. RASER combines DEVSIM, Geant4, Shockley–Ramo current calculation, drift-diffusion transport, and CFD timing extraction [2306.09576]. WeightField2 was later used for ultra-thin AC-LGAD studies including irradiation, acceptor removal, carrier trapping, and TDC contributions [2601.16925].

## 4. Electrical characteristics and charge-collection performance

The first fabricated 4H-SiC LGAD, SICAR, established the basic experimental signatures of the technology. Reverse I–V and C–V measurements showed a gain-layer depletion step at $\sim65$–$80\,\mathrm{V}$ and a bulk-depletion knee near $400\,\mathrm{V}$; the leakage current was reduced by four orders of magnitude through process optimization to $2.4\,\mathrm{nA}$ at $400\,\mathrm{V}$ reverse bias; gain was reported to be about 2 at $150\,\mathrm{V}$; and the charge collection efficiency reached $90\%$ at $100\,\mathrm{V}$ and unity by $150\,\mathrm{V}$ under $5.54\,\mathrm{MeV}$ $\alpha$ irradiation [2405.18112]. A separate characterization study of mesa 4H-SiC LGADs and PiN references reported, for a $75\,\mu\mathrm{m}$ device, $\mathrm{I_{LGAD}}\approx2\times10^{-10}\,\mathrm{A}$ at $600\,\mathrm{V}$, $\mathrm{V_{br,LGAD}}\approx1160\,\mathrm{V}$ without edge termination, a C–V step at about $77\,\mathrm{V}$, and gain $G\approx 2.5$ at $600\,\mathrm{V}$ with a projected $G\to3.0$–$3.5$ near $800\,\mathrm{V}$ [2408.12744].

The first onsemi generation moved the measured gain substantially upward. For $3\times3\,\mathrm{mm^2}$ pads, the total capacitance was reported as $18.0\pm0.2\,\mathrm{pF}$, the gain-layer depletion voltage as about $155$–$220\,\mathrm{V}$, and the breakdown voltage as $\approx480\,\mathrm{V}$ for LGAD1 and $\approx500\,\mathrm{V}$ for LGAD2, while UV-LED tests gave measured $G\approx6$–$12$ in the same voltage range [2503.07490]. In the subsequent next-generation study, IV data showed $\mathrm{I_{rev}}(300\,\mathrm{V})\sim0.5$–$1\,\mu\mathrm{A}$ for LGAD1/2, breakdown above $500\,\mathrm{V}$ for about $85\%$ yield across about 20 devices, and CV data showed full depletion uniformity with $\sigma(V_{\rm dep})/\langle V_{\rm dep}\rangle \lesssim 5\%$ over 20 samples [2504.09264]. TCT gain extraction gave LGAD1 $M \simeq 5$ at $400\,\mathrm{V}$ and $M \simeq 15$–$20$ at $800\,\mathrm{V}$, while for one wafer the gain at $700\,\mathrm{V}$ over about 20 LGAD1 devices was $\langle M\rangle = 17$ with $\sigma(M)=2$ [2504.09264].

A separate Sentaurus design study illustrates the high-voltage end of the design space. In the nominal $30\,\mu\mathrm{m}$ device without guard, simulated dark currents remained below $30\,\mathrm{pA}$ up to $1\,\mathrm{kV}$ for all but the worst-case gain layer, the gain layer depleted by $400\,\mathrm{V}$, the full device depleted by $500\,\mathrm{V}$, and $C^{-2}$–$V$ was linear from $0$ to $500\,\mathrm{V}$ with full depletion at about $480\,\mathrm{V}$ [2510.14531]. The nominal multiplication rose smoothly from 1 at $400\,\mathrm{V}$ to $5$–$10$ at $900$–$1000\,\mathrm{V}$, and a trench-plus-JTE guard sweep identified an optimized breakdown voltage of $2.45\,\mathrm{kV}$ for trench width $16\,\mu\mathrm{m}$ and trench depth $7\,\mu\mathrm{m}$ [2510.14531]. The literature therefore does not support a single canonical gain figure for 4H-SiC LGADs; rather, measured and simulated values span about $M\approx1.8$ to $20$ depending on thickness, polarity, implantation strategy, and bias.

## 5. Fast timing performance and signal formation

Timing performance in 4H-SiC LGADs is constrained by the same two factors that dominate Si LGAD timing—slew rate and charge statistics—but with the additional complication of lower intrinsic charge generation in SiC. In the $75\,\mu\mathrm{m}$ beta-timing device, the reported structure consisted of a $0.3\,\mu\mathrm{m}$ $p^{++}$ contact, a $0.5\,\mu\mathrm{m}$ $N^+$ gain layer at $4\times10^{17}\,\mathrm{cm^{-3}}$, and a $75\,\mu\mathrm{m}$ $N^-$ drift layer at $\sim2\times10^{14}\,\mathrm{cm^{-3}}$, with a field-plate termination [2509.04638]. UV-TCT measured $M\approx7$–$8$ at $500\,\mathrm{V}$, the most probable collected charge under ${}^{90}\mathrm{Sr}$ was about $4$–$5\,\mathrm{fC}$ at $500\,\mathrm{V}$, and the time resolution extracted by quadrature deconvolution,
$$
\sigma_{\Delta T}^2=\sigma_{\rm Si}^2+\sigma_{\rm SiC}^2,
$$
was $\sigma_{\rm SiC}\simeq61\,\mathrm{ps}$ at $500\,\mathrm{V}$ [2509.04638]. The same work identifies limited charge generation, rather than intrinsic drift speed, as the present timing bottleneck.

Simulation had anticipated a more aggressive timing envelope. Using RASER, a $50\,\mu\mathrm{m}$-bulk design with a $1.0\,\mu\mathrm{m}$ gain layer and a $0.3\,\mu\mathrm{m}$ $p^{++}$ contact yielded a simulated $\sigma_t=(35.0\pm0.2)\,\mathrm{ps}$ at $800\,\mathrm{V}$ for 50,000 MIP events under CFD timing, with component terms $\sigma_{\rm Landau}\approx18\,\mathrm{ps}$, $\sigma_{\rm Jitter}\approx15\,\mathrm{ps}$, and $\sigma_{\rm Distortion}\approx10\,\mathrm{ps}$ [2306.09576]. In the same study the LGAD outperformed a simulated 4H-SiC PIN detector, which had $\sigma_t\approx94\,\mathrm{ps}$ at $-600\,\mathrm{V}$ [2306.09576]. The experimental trajectory is therefore consistent with the simulation literature in one narrow sense: internal gain is necessary to bring SiC timing into the tens-of-picoseconds regime.

Measured and simulated next-generation data occupy the intermediate regime between the earliest low-gain devices and the most aggressive timing projections. Beta-source measurements on the onsemi generation reported timing resolution $\lesssim100\,\mathrm{ps}$ at $800\,\mathrm{V}$ for W19_LGAD1, comparable to an HPK Si LGAD reference in that setup [2504.09264]. Ultra-thin AC-LGAD studies using WeightField2 then pushed the projected timing substantially lower: for a $20\,\mu\mathrm{m}$ 4H-SiC sensor, the reported unirradiated timing was $\sigma_t\approx13\,\mathrm{ps}$ at $V_{\rm bias}=360\,\mathrm{V}$, with $\sigma_t<18\,\mathrm{ps}$ at $\Phi=1\times10^{15}\,\mathrm{n_{eq}/cm^2}$ and $\sigma_t\approx20$–$25\,\mathrm{ps}$ at $\Phi=5\times10^{15}\,\mathrm{n_{eq}/cm^2}$ [2601.16925]. Those results are simulation-based, but they sharpen a point already visible in the measured beta data: reducing thickness and increasing collected charge per unit transit time is central to the timing roadmap.

## 6. Radiation response, segmentation, and current design directions

Radiation behavior is a defining question for 4H-SiC LGADs, and the available measurements show both resilience and nontrivial degradation. In SICAR irradiated with $80\,\mathrm{MeV}$ protons up to $1\times10^{14}\,\mathrm{n_{eq}/cm^2}$, I–V, C–V, and $\alpha$-particle measurements showed an increase in threshold voltage, a 2 to 4 order of magnitude reduction in leakage current, and a charge collection efficiency decrease of about $50\%$ [2507.12238]. The same study reported a forward turn-on shift from about $3$–$4\,\mathrm{V}$ to above $40\,\mathrm{V}$ at the highest fluence, flat C–V behavior at $\Phi \ge 3.5\times10^{13}\,\mathrm{n_{eq}/cm^2}$ due to compensation in the drift layer, and a degradation law for the gain factor of the form
$$
M(\Phi)\approx M_0\frac{1}{1+\beta\Phi},
$$
with $\beta\approx1.2\times10^{-14}\,\mathrm{cm^2}$ [2507.12238].

A distinct proton campaign at $2.5\,\mathrm{GeV}$ reached similar conclusions through a different dataset. There, 4H-SiC LGADs and complementary PiN diodes were irradiated up to $3.33\times10^{14}\,\mathrm{p/cm^2}$, and the LGAD gain at $500\,\mathrm{V}$ decreased monotonically from $1.8\pm0.1$ before irradiation to $1.6\pm0.1$ at $1\times10^{13}\,\mathrm{p/cm^2}$, $1.1\pm0.1$ at $1\times10^{14}\,\mathrm{p/cm^2}$, and $1.0\pm0.05$ at $3.33\times10^{14}\,\mathrm{p/cm^2}$ [2507.23062]. The same work reported loss of rectification, disappearance of the I–V step associated with gain-layer depletion, nearly flat capacitance below $0.5\,\mathrm{pF}$ over $0$–$500\,\mathrm{V}$ at high fluence, and identified gain-layer compensation together with defect-limited carrier acceleration as the main gain-reducing mechanisms [2507.23062]. A common misconception is therefore contradicted by the existing data: the wide bandgap of 4H-SiC does not imply invariance of LGAD gain under irradiation, even though measurable signal and some gain can persist.

Segmentation has now moved from proposal to realized hardware. The first fabricated and characterized segmented 4H-SiC LGADs include strip detectors with $80\,\mu\mathrm{m}$ pitch and pixel arrays with $55\,\mu\mathrm{m}$ and $110\,\mu\mathrm{m}$ pitch, implemented with both geometric separation and oxide-filled trenches [2605.17192]. TPA-TCT measurements demonstrated clear charge separation between adjacent strips with internal gain, and internal gains of about $6$–$10$ at $300\,\mathrm{V}$ were inferred from TCT ratios [2605.17192]. The same study reported that devices with $G=0\,\mu\mathrm{m}$ exhibited avalanche breakdown near about $80$–$100\,\mathrm{V}$ regardless of isolation type, while devices with $G\ge1\,\mu\mathrm{m}$ remained stable up to at least $700\,\mathrm{V}$, and it found that geometric separation with $G\ge1\,\mu\mathrm{m}$ was sufficient to suppress gain between channels to $M\approx1$ [2605.17192].

Current design directions are correspondingly specific. Proposed strategies include fine-tuning the $p^+$ implant dose and profile via multi-energy implants and tailored anneals, exploring thicker epitaxial growth of $75$–$100\,\mu\mathrm{m}$ or double-gain-layer designs, reducing drift-layer doping to enable fuller depletion at available bias, and refining JTE or trench isolation to push breakdown above $600\,\mathrm{V}$ or $1\,\mathrm{kV}$ depending on geometry [2504.09264], [2509.04638], [2601.16925]. In the high-voltage trench-terminated program, the recommended process window was a gain-layer thickness of $2.4\pm0.2\,\mu\mathrm{m}$, gain-layer doping of $7.5\times10^{16}\pm10\%\,\mathrm{cm^{-3}}$, trench width $w_t\ge10\,\mu\mathrm{m}$ with $d_t=7\pm0.5\,\mu\mathrm{m}$, and JTE width $30\pm2\,\mu\mathrm{m}$ with depth $4\pm0.2\,\mu\mathrm{m}$, within which the device fully depletes below $500\,\mathrm{V}$, provides $M=2$–$10$ up to $1\,\mathrm{kV}$, and withstands more than $2.4\,\mathrm{kV}$ without premature breakdown; a corresponding wafer run is currently processed at IMB-CNM, Barcelona [2510.14531]. Taken together, these programs define the present state of the field: 4H-SiC LGADs have progressed beyond proof of principle, but their eventual competitiveness will depend on simultaneously increasing collected charge, stabilizing gain under irradiation, and preserving high-voltage robustness in segmented layouts.

Source: https://www.emergentmind.com/topics/4h-sic-low-gain-avalanche-detectors-lgads